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2000-07-11Patch rtems-rc-20000711-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill7-7/+7
2000-07-07Moved old_exception_processing and new_exception_processing directoriesJoel Sherrill1-7/+1
2000-07-03Interrupt stack is allocated in _ISR_Handler_initialization notJoel Sherrill8-8/+8
2000-07-03Changed extra_system_initialization_stack to extra_mpci_receive_server_stackJoel Sherrill1-1/+1
2000-06-29This is the initial addition of the port of RTEMS to theJoel Sherrill12-0/+1979
2000-06-15Remove pragma align 4Joel Sherrill1-2/+0
2000-06-14Patch rtems-rc-20000614-sh.tar.gz from Ralf CorsepiusJoel Sherrill2-11/+12
2000-06-14Moved PowerPC cache management code to libcpu. Also compiledJoel Sherrill1-151/+0
2000-06-13Added crude i960ka support.Joel Sherrill3-6/+38
2000-06-13Moved i386 and m68k cache management code to libcpu. EverythingJoel Sherrill2-306/+0
2000-06-12Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine GauthierJoel Sherrill5-10/+542
2000-06-12Works on Solaris and Linux.Joel Sherrill1-8/+6
2000-06-12Merged from 4.5.0-beta3aJoel Sherrill33-88/+527
2000-04-13Patch rtems-rc-4.5.0-13-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>.Joel Sherrill11-0/+66
2000-04-13Patch rtems-rc-4.5.0-13-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>.Joel Sherrill24-0/+136
2000-03-01Added routines to get and set C3x IOF register. The code is conditionallyJoel Sherrill2-26/+142
2000-02-29BSP now compiles and links with CAVSL board information. This includesJoel Sherrill1-3/+3
2000-02-22New port of RTEMS to TI C3x and C4x.Joel Sherrill12-0/+3149
2000-01-31Patches rtems-rc-20000118-3.diff and rtems-rc-20000118-4.diff fromJoel Sherrill12-212/+165
2000-01-27Added after report from Quality Quorum <qqi@world.std.com> thatJoel Sherrill1-0/+5
2000-01-14Removed warning.Joel Sherrill2-2/+4
2000-01-04Removed unitialized variable warning.Joel Sherrill1-4/+3
2000-01-03Increased stack size to 4K per Eric Norum.Joel Sherrill1-1/+1
2000-01-03Increased minimum stack size so all tests will run.Joel Sherrill1-1/+1
1999-12-13Patch from Jepsen Hans Peter <hans_peter_jepsen@Danfoss.com> toJoel Sherrill1-1/+1
1999-12-03Patch rtems-rc-19991123-rc-3.diff from Ralf CorsepiusJoel Sherrill1-3/+3
1999-12-02Patch rtems-rc-19991123-rc-2.diff from Ralf CorsepiusJoel Sherrill2-0/+31
1999-12-02Merged of mcp750 and mvme2307 BSP by Eric Valette <valette@crf.canon.fr>.Joel Sherrill1-2/+2
1999-12-01 Patch rtems-rc-19991123-rc-2.diff from Ralf CorsepiusJoel Sherrill6-0/+318
1999-12-01Patch rtems-rc-19991123-rc-1.diff from Ralf CorsepiusJoel Sherrill5-0/+240
1999-11-22Changed name of W, X, and Y macros for fields in the ClockJoel Sherrill2-18/+18
1999-11-22Small patch (rtems-rc-19991117-5.diff) from Ralf CorsepiusJoel Sherrill1-1/+1
1999-11-18Minor cleanup to reduce the code space.Joel Sherrill1-14/+9
1999-11-18Patch from "John M. Mills" <jmills@tga.com> with subsequent cleanup fromJoel Sherrill3-4/+16
1999-11-17Updated copyright notice.Joel Sherrill45-83/+45
1999-11-16Only check for System V IPC if multiprocessing is enabled. The unixJoel Sherrill2-1/+11
1999-11-05This is another pass at making sure that nothing outside the BSPJoel Sherrill11-2/+127
1999-11-04The files in libcpu should not be directly dependent on any BSP. InJoel Sherrill2-2/+8
1999-10-28Patch rtems-rc-19991011-3.diff from Ralf Corsepius.Joel Sherrill1-25/+0
1999-10-27rxgen960 now compiles -- may not link.Joel Sherrill1-3/+3
1999-10-27The rxgen960 BSP and i960 RPM support was submitted by Mark BronsonJoel Sherrill3-43/+245
1999-10-26Patch from Gerwin Pfab <pb@schenk.isar.de> to leave dispatchingJoel Sherrill1-3/+4
1999-10-05Removed targets and configurations that are no longer functionalJoel Sherrill3-33/+0
1999-10-05Bug report and fix from Jay Kulpinski <jskulpin@eng01.gdds.com> whereJoel Sherrill1-3/+2
1999-08-26Typo causing compilation failure spotted by Ralf Corsepius andJoel Sherrill1-1/+1
1999-08-19Support for MPC505 from Sergei Organov <osv@Javad.RU>. His patch wasJoel Sherrill1-0/+17
1999-08-18Patch from Jimen Ching <jimen@adtech-inc.com>:Joel Sherrill1-0/+45
1999-08-18Slightly cleaner way to switch on the CPU model.Joel Sherrill1-6/+10
1999-08-12Patch from Ralf Corsepius <corsepiu@faw.uni-ulm.de>:Joel Sherrill1-14/+8
1999-07-29Patch from Charles-Antoine Gauthier <charles.gauthier@iit.nrc.ca>Joel Sherrill12-13/+16
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