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* cpukit: add and use CPU_Uint32ptr typeGedare Bloom2015-03-161-0/+3
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* score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber2015-03-051-24/+0
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* Let CPU/BSP Fatal handler have access to sourceDaniel Hellstrom2014-09-101-1/+1
| | | | | | | | | Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
* score: Statically initialize _ISR_Vector_tableSebastian Huber2014-04-291-19/+0
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* score: Rename Priority_bit_map_ControlSebastian Huber2014-04-032-2/+2
| | | | Rename Priority_bit_map_Control in Priority_bit_map_Word.
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-218-8/+8
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* score: Add CPU counter supportSebastian Huber2014-02-142-0/+13
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* Add thread-local storage (TLS) supportSebastian Huber2014-02-042-2/+5
| | | | | Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
* score: Simplify <rtems/score/cpuatomic.h>WeiY2013-08-281-30/+6
| | | | Add proper license and copyright.
* score/cpu: Add CPU_Per_CPU_controlSebastian Huber2013-08-091-0/+6
| | | | Add CPU port specific per-CPU control.
* update-all-architectures-to-new-atomic-implementationWeiY2013-07-171-6/+4
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* score: Add CPU context validationSebastian Huber2013-05-101-0/+12
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* Revert bootstrap whitespace changes.Chris Johns2013-05-101-0/+1
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* Using the generic atomic ops to implement UP mode atomic for all ↵WeiY2013-05-013-0/+44
| | | | architectures. SMP atomic port will be later.
* cpukit: Use Consistent Beginning of Doxygen Group NotationJoel Sherrill2013-01-101-11/+6
| | | | | This is the result of a sed script which converts all uses of @{ into a consistent form.
* score: Doxygen Clean Up Task #16Alex Ivanov2013-01-084-659/+675
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* score: Doxygen Clean Up Task #15Alex Ivanov2013-01-081-7/+6
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* score misc: Clean up Doxygen #13 (GCI 2012)Mathew Kallada2012-12-022-2/+5
| | | | | | | This patch is a task from GCI 2012 which improves the Doxygen comments in the RTEMS source. http://www.google-melange.com/gci/task/view/google/gci2012/8013205
* score: Add CPU_Exception_frameSebastian Huber2012-11-273-0/+30
| | | | | | | | | | | | | | | | | | | | | Add CPU port type CPU_Exception_frame and function _CPU_Exception_frame_print(). The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh, sparc64, and v850 use an empty default implementation of _CPU_Exception_frame_print(). Add rtems_exception_frame and rtems_exception_frame_print(). Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal() with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc, and sparc for unexpected exceptions. Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the BSP_PRINT_EXCEPTION_CONTEXT define used in the default bsp_fatal_extension(). Add test sptests/spfatal26.
* score: PR1607: Add and use CPU_SIZEOF_POINTERSebastian Huber2012-11-221-0/+2
| | | | | | | | | | | | | | | | | Add and use new CPU port define CPU_SIZEOF_POINTER. It must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code. The size of a pointer is part of the application binary interface (ABI) and thus independent of the actual programming language. The compiler will provide defines to determine the current ABI. We use these defines to select the appropriate CPU_SIZEOF_POINTER value. Static assertions in the new file "cpukit/score/src/percpuasm.c" will ensure that the value of CPU_SIZEOF_POINTER is consistent with the current compiler settings. Also the offset values used by assembler code are verfied.
* v850 - byte swap instructions not available on all multilibsJoel Sherrill2012-06-122-7/+33
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* v850 port: Initial addition with BSP for simulator in GDBJoel Sherrill2012-06-119-0/+1924
Port + v850 does not have appear to have any optimized bit scan instructions + v850 does have single instructions for wap u16 and u32 + Code path optimization preferences set + Add BSP variants for each GCC CPU model flag and a README - v850e1 variant does not work (fails during BSP initialization) BSP for GDB v850 Simulator + linkcmds matches defaults in GDB simulator with RTEMS mods + crt1.c added from v850 newlib port for __main() + BSP exits cleanly + printk and console I/O work + uses clock tick from IDLE task + Tests not requiring real clock ISR work Documentation + CPU Supplment chapter for v850 added
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