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* Canonicalize config.h includeSebastian Huber2020-04-161-1/+1
| | | | | | | | Use the following variant which was already used by most source files: #ifdef HAVE_CONFIG_H #include "config.h" #endif
* sparc: Improve _CPU_Context_validate()Sebastian Huber2019-06-061-8/+20
| | | | | | Use the FPU and check that the condition codes in the PSR are preserved. Update #3756.
* sparc: Add lazy floating point switchSebastian Huber2017-07-251-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPARC ABI is a bit special with respect to the floating point context. The complete floating point context is volatile. Thus, from an ABI point of view nothing needs to be saved and restored during a context switch. Instead the floating point context must be saved and restored during interrupt processing. Historically, the deferred floating point switch was used for SPARC and the complete floating point context is saved and restored during a context switch to the new floating point unit owner. This is a bit dangerous since post-switch actions (e.g. signal handlers) and context switch extensions may silently corrupt the floating point context. The floating point unit is disabled for interrupt handlers. Thus, in case an interrupt handler uses the floating point unit then this will result in a trap (INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT). In uniprocessor configurations, a lazy floating point context switch is used. In case an active floating point thread is interrupted (PSR[EF] == 1) and a thread dispatch is carried out, then this thread is registered as the floating point owner. When a floating point owner is present during a context switch, the floating point unit is disabled for the heir thread (PSR[EF] == 0). The floating point disabled trap checks that the use of the floating point unit is allowed and saves/restores the floating point context on demand. Update #3077.
* sparc: Add assembly workaround for LEON3FT B2BST errataDaniel Cederman2017-07-171-0/+1
| | | | | | | | | | | | | | | This patch adds NOP instructions to prevent instruction sequences that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009: "LEON3FT Stale Cache Entry After Store with Data Tag Parity Error" for more information. The sequences are only modified if __FIX_LEON3FT_B2BST is defined. The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc, and -mfix-ut699 GCC flags that prevents the sensitive sequences from being generated. Update #3057.
* sparc: Move CPU_Interrupt_frame related definesSebastian Huber2016-11-181-1/+1
| | | | | | Move CPU_Interrupt_frame related defines to <rtems/score/cpuimpl.h>. Update #2809.
* sparc: Rename CPU_Minimum_stack_frameSebastian Huber2016-11-181-1/+1
| | | | | | | | Rename SPARC-specific CPU_Minimum_stack_frame to SPARC_Minimum_stack_frame. Rename SPARC-specific CPU_MINIMUM_STACK_FRAME_SIZE to SPARC_MINIMUM_STACK_FRAME_SIZE. Update #2809.
* sparc: Improve _CPU_Context_validate()Alexander Krutwig2015-05-291-46/+49
| | | | | | | Write the pattern only once to the entry register window and the floating point registers. Update #2270.
* sparc: Add support for sptests/spcontext01Alexander Krutwig2015-05-211-0/+368
Implement _CPU_Context_validate() and _CPU_Context_volatile_clobber(). Update #2270.