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* 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-041-2/+0
| | | | | | * cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU Table to Configuration Table. Eliminate CPU Table from all ports. Delete references to CPU Table in all forms.
* 2007-11-02 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-11-021-2/+2
| | | | | | | | * score/cpu/sparc/cpu.c, score/cpu/sparc/rtems/score/cpu.h, score/include/rtems/score/context.h, score/src/threadhandler.c: Fix stack so gdb backtrace does not print corrupted frame message after _Thread_Handler. Daniel Hellstrom <daniel@gaisler.com> provided the SPARC implementation and I made it more general.
* 2007-05-22 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-05-221-6/+0
| | | | | | | | | * score/cpu/arm/cpu.c, score/cpu/avr/cpu.c, score/cpu/bfin/cpu.c, score/cpu/c4x/cpu.c, score/cpu/h8300/cpu.c, score/cpu/i386/cpu.c, score/cpu/m68k/cpu.c, score/cpu/mips/cpu.c, score/cpu/nios2/cpu.c, score/cpu/no_cpu/cpu.c, score/cpu/sh/cpu.c, score/cpu/sparc/cpu.c, cpukit/sapi/src/exinit.c: Move copying of CPU Table to shared executive initialization.
* 2007-05-10 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-05-101-0/+13
| | | | | | | | PR 1237/rtems * cpu.c, cpu_asm.S, rtems/score/cpu.h: Add logic to prevent stack creep when interrupts occur at a sufficient rate that the interrupted thread never gets to clean its stack. This patch ensures that an interrupted thread will not nest ISR dispatches on its stack.
* Use Context_Control_fp* instead of void* for fp_contexts.Ralf Corsepius2007-04-171-1/+1
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* 2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>Ralf Corsepius2004-03-301-17/+17
| | | | | * cpu.c, rtems/score/cpu.h, rtems/score/sparc.h: Convert to using c99 fixed size types.
* 2003-09-04 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-041-1/+1
| | | | | * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/sparc.h, rtems/score/types.h: URL for license changed.
* 2002-08-08 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Ralf Corsepius2002-08-081-2/+1
| | | | * cpu.c: Move pointer into #ifdef to avoid compiler warning.
* 2002-04-01 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2002-04-031-2/+0
| | | | | * cpu.c: Remove call to sparc_init_tbr/NO_TABLE_MOVE. * rtems/score/cpu.h: Remove NO_TABLE_MOVE conditional code.
* 2002-03-28 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2002-03-291-32/+2
| | | | | | | | * cpu.c: Replace NO_TABLE_MOVE-support by external function (code moved to libcpu/sparc/tbr/tbr.c). * cpu.h: Replace NO_TABLE_MOVE-support by external function (code moved to libcpu/sparc/tbr/tbr.h). * sparc.h: Add sparc_init_tbr (implemented in libcpu/sparc/tbr/tbr.c).
* 2000-12-06 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-061-0/+1
| | | | * cpu.c: Added include of <rtems/rtems/cache.h> to eliminate warning.
* 2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>Joel Sherrill2000-11-151-0/+8
| | | | | | * cpu.c, rtems/cpu/sparc.h: Make floating point optional based on gcc arguments. Do not initialize FP context if there is no FPU. Flush instruction cache after installing RTEMS trap handler.
* Reworked score/cpu/sparc so it can be safely compiled multilib. AllJoel Sherrill2000-07-111-54/+0
| | | | | | routines and structures that require CPU model specific information are now in libcpu. This primarily required moving erc32 specific information from score/cpu files to libcpu/sparc and the erc32 BSP.
* Updated copyright notice.Joel Sherrill1999-11-171-2/+1
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* updated copyright to 1998Joel Sherrill1998-02-171-1/+1
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* Fixed typo in the pointer to the license terms.Joel Sherrill1997-10-081-2/+2
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* headers updated to reflect new style copyright notice as partJoel Sherrill1997-04-221-5/+5
| | | | of switching to the modified GNU GPL.
* Changes to reflect new revision of erc32 per Jiri Gaisler's suggestions.Joel Sherrill1996-12-021-0/+5
| | | | This is current as of sis 2.6.
* Dispersal of internal thread handler resulted in IDLE thread becomingJoel Sherrill1996-02-211-2/+2
| | | | | part of the Thread Handler. This required the name of the optional CPU dependent IDLE thread implementation to change.
* typos fixedJoel Sherrill1995-10-311-0/+15
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* SPARC port passes all testsJoel Sherrill1995-10-301-89/+281
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* SPARC merged and successfully tested w/o interrupt supportJoel Sherrill1995-10-061-0/+197
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