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Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it
is a proper declaration of a function which does not return. Fix the type of
the error code. If necessary, add the implementation to cpu.c. Implementing
_CPU_Fatal_halt() as a function makes it possible to wrap this function for
example to fully test _Terminate().
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Update #3585.
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Remove the CPU_PROVIDES_IDLE_THREAD_BODY option to avoid unnecessary
conditional compilation.
Close #3539.
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Update #2559.
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Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
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This patch is a task from GCI 2012 which improves the Doxygen
comments in the RTEMS source.
http://www.google-melange.com/gci/task/view/google/gci2012/8013205
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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* cpu.c: Remove /*PAGE markers which were interpreted by a long dead
print script.
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* context.c, cpu.c, rtems/score/cpu.h, rtems/score/sh.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
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* cpu.c: Warning removal.
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* context.c, cpu.c: Add include of config.h
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* cpu.c, rtems/score/cpu.h: Change prototype of IDLE thread to
consistently return void * and take a uintptr_t argument.
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* cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and
passing address of _Thread_Dispatch to _CPU_Initialize. Clean up
comments.
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* cpu.c: Fine tune conditional so _CPU_ISR_install_vector is in CPU Kit
now.
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* cpu.c: Remove extraneous spaces.
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* cpu.c, rtems/score/cpu.h: Correct prototype of Idle threads.
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* cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU
Table to Configuration Table. Eliminate CPU Table from all ports.
Delete references to CPU Table in all forms.
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* score/cpu/arm/cpu.c, score/cpu/avr/cpu.c, score/cpu/bfin/cpu.c,
score/cpu/c4x/cpu.c, score/cpu/h8300/cpu.c, score/cpu/i386/cpu.c,
score/cpu/m68k/cpu.c, score/cpu/mips/cpu.c, score/cpu/nios2/cpu.c,
score/cpu/no_cpu/cpu.c, score/cpu/sh/cpu.c, score/cpu/sparc/cpu.c,
cpukit/sapi/src/exinit.c: Move copying of CPU Table to shared
executive initialization.
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* cpu.c, rtems/score/sh.h: Recognize sh2e variant so multilibs will all
compile.
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* cpu.c, rtems/score/cpu.h, rtems/score/sh.h, rtems/score/sh_io.h:
Convert to using c99 fixed size types.
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* asm.h, cpu.c, rtems/score/cpu.h, rtems/score/sh.h,
rtems/score/sh_io.h, rtems/score/types.h: URL for license changed.
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* cpu.c: Fix #ifdefs, add missing #endif.
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* asm.h, cpu.c, rtems.c, rtems/score/cpu.h, rtems/score/sh.h,
rtems/score/sh_io.h, rtems/score/shtypes.h: Consistency changes
and made sure there were no includes from the libcpu tree.
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* cpu.c, rtems/score/cpu.h, rtems/score/sh.h: Modified to
support SH4. Reviewed by Ralf Corsepius <corsepiu@faw.uni-ulm.de>
who did the original SH port.
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* cpu.c (_CPU_ISR_install_vector): Corrected interrupt range
checking which was SH1 specific. It didn't work for SH2 (has more
interrupt sources).
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Ralf Corsepius <corsepiu@faw.uni-ulm.de> that adds initial Hitachi SH-2
support to RTEMS. Ralf's comments are:
Changes:
------
1. SH-Port:
* Many files renamed.
* CONSOLE_DEVNAME and MHZ defines removed from libcpu.
* console.c moved to libbsp/sh/shared, build in libbsp/sh/<BSP>/console
applying VPATH.
* CONSOLE_DEVNAME made BSP-specific, replacement is defined in bsp.h
* MHZ define replaced with HZ (extendent resolution) in custom/*.cfg
* -DHZ=HZ used in bspstart.c, only
* Makefile variable HZ used in bsp-dependent directories only.
2. SH1-Port
* clock-driver rewritten to provide better resolution for odd CPU
frequencies. This driver is only partially tested on hardware, ie.
sightly experimental, but I don't expect severe problems with it.
* Polling SCI-driver added. This driver is experimental and completly
untested yet. Therefore it is not yet used for the console (/dev/console
is still pointing to /dev/null, cf. gensh1/bsp.h).
* minor changes to the timer driver
* SH1 specific delay()/CPU_delay() now is implemented as a function
3. SH2-Port
* Merged
* IMO, the code is still in its infancy. Therefore I have interspersed
comments (FIXME) it for items which I think John should look after.
* sci and console drivers partially rewritten and extended (John, I hope
you don't mind).
* Copyright notices are not yet adapted
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of switching to the modified GNU GPL.
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cpu.h: added prototype for _CPU_ISR_Get_level()
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Derrick Ostertag (ostertag@transition.com).
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part of the Thread Handler. This required the name of the optional
CPU dependent IDLE thread implementation to change.
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Configuration Table Template file added and all tests
modified to use this. All gvar.h and conftbl.h files
removed from test directories.
Configuration parameter maximum_devices added.
Core semaphore and mutex handlers added and RTEMS API Semaphore
Manager updated to reflect this.
Initialization sequence changed to invoke API specific initialization
routines. Initialization tasks table now owned by RTEMS Tasks Manager.
Added user extension for post-switch.
Utilized user extensions to implement API specific functionality
like signal dispatching.
Added extensions to the System Initialization Thread so that an
API can register a function to be invoked while the system
is being initialized. These are largely equivalent to the
pre-driver and post-driver hooks.
Added the Modules file oar-go32_p5, modified oar-go32, and modified
the file make/custom/go32.cfg to look at an environment varable which
determines what CPU model is being used.
All BSPs updated to reflect named devices and clock driver's IOCTL
used by the Shared Memory Driver. Also merged clock isr into
main file and removed ckisr.c where possible.
Updated spsize to reflect new and moved variables.
Makefiles for the executive source and include files updated to show
break down of files into Core, RTEMS API, and Neither.
Header and inline files installed into subdirectory based on whether
logically in the Core or a part of the RTEMS API.
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