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* score: _CPU_Context_switch_to_first_task_smp()Sebastian Huber2014-02-051-3/+0
| | | | | Delete _CPU_Context_switch_to_first_task_smp() and use _CPU_Context_restore() instead.
* Add thread-local storage (TLS) supportSebastian Huber2014-02-041-1/+2
| | | | | Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
* powerpc: Add r2 to CPU contextSebastian Huber2013-11-183-11/+13
| | | | The r2 may be used for thread-local storage.
* powerpc: Do not validate reserved XER bitsSebastian Huber2013-11-181-2/+2
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* score: Simplify <rtems/score/cpuatomic.h>WeiY2013-08-281-30/+6
| | | | Add proper license and copyright.
* powerpc: Fix _CPU_Context_validate()Sebastian Huber2013-08-131-1/+1
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* score/cpu: Add CPU_Per_CPU_controlSebastian Huber2013-08-091-0/+6
| | | | Add CPU port specific per-CPU control.
* smp: Rename _CPU_Processor_event_receive()Sebastian Huber2013-07-171-1/+1
| | | | Rename to _CPU_SMP_Processor_event_receive().
* smp: Rename _CPU_Processor_event_broadcast()Sebastian Huber2013-07-171-1/+1
| | | | Rename to _CPU_SMP_Processor_event_broadcast().
* smp: Add and use _CPU_SMP_Send_interrupt()Sebastian Huber2013-07-171-0/+1
| | | | Delete bsp_smp_interrupt_cpu().
* smp: Add and use _CPU_SMP_Get_current_processor()Sebastian Huber2013-07-171-0/+15
| | | | | | | | | | Add and use _SMP_Get_current_processor() and rtems_smp_get_current_processor(). Delete bsp_smp_interrupt_cpu(). Change type of current processor index from int to uint32_t to match _SMP_Processor_count type.
* update-all-architectures-to-new-atomic-implementationWeiY2013-07-171-509/+10
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* powerpc: Fix Altivec supportSebastian Huber2013-06-261-4/+4
| | | | Use the right context.
* smp: Add PowerPC supportSebastian Huber2013-05-314-1/+116
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* score: Add CPU context validationSebastian Huber2013-05-104-0/+314
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* RTEMS: Delete ChangeLog files.Gedare Bloom2013-03-081-977/+0
| | | | | | | | | This commit deletes all RTEMS ChangeLog files. These files have been abandoned since converting to git version control. The historical data may be recovered by checking out any commit before this one. Most of the contents of these ChangeLog files can also be found in the git log. Two external ChangeLog files, ChangeLog.slac and ChangeLog.zlib, remain.
* score: atomic support for RTEMS. Cleanup.WeiY2013-02-071-38/+38
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* score: atomic support for RTEMS. Atomic operations for PowerPC.WeiY2013-02-071-0/+537
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* score: atomic support for RTEMS automake and autoconf changesWeiY2013-02-072-0/+5
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* score: Doxygen Clean Up Task #5Alex Ivanov2013-01-025-20/+35
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* score misc: Clean up Doxygen GCI Task #12Alex Ivanov2012-12-072-0/+12
| | | | http://www.google-melange.com/gci/task/view/google/gci2012/7983217
* Print MCSR and ESR.Ric Claus2012-12-011-0/+5
| | | | | | | The Machine Check and Exception Syndrome Registers on Book-E and Book-E-like processors contain useful information for decoding the cause of an exception. NB: This patch depends on the PR 2048 patch sent earlier having been applied.
* PR 2048: Removed use of PPC440 macro.Ric Claus2012-12-012-103/+131
| | | | | Retrying this patch as a stand alone patch and with fewer whitespace differences. Also included are additional Book-E and PPC440 SPR definitions.
* score: Add CPU_Exception_frameSebastian Huber2012-11-271-0/+9
| | | | | | | | | | | | | | | | | | | | | Add CPU port type CPU_Exception_frame and function _CPU_Exception_frame_print(). The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh, sparc64, and v850 use an empty default implementation of _CPU_Exception_frame_print(). Add rtems_exception_frame and rtems_exception_frame_print(). Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal() with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc, and sparc for unexpected exceptions. Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the BSP_PRINT_EXCEPTION_CONTEXT define used in the default bsp_fatal_extension(). Add test sptests/spfatal26.
* powerpc: Add CPU_Exception_frameSebastian Huber2012-11-271-0/+46
| | | | | The powerpc port uses now a unified CPU_Exception_frame. This resulted in a CPU_Exception_frame layout change for the MPC5XX.
* score: PR1607: Add and use CPU_SIZEOF_POINTERSebastian Huber2012-11-221-0/+2
| | | | | | | | | | | | | | | | | Add and use new CPU port define CPU_SIZEOF_POINTER. It must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code. The size of a pointer is part of the application binary interface (ABI) and thus independent of the actual programming language. The compiler will provide defines to determine the current ABI. We use these defines to select the appropriate CPU_SIZEOF_POINTER value. Static assertions in the new file "cpukit/score/src/percpuasm.c" will ensure that the value of CPU_SIZEOF_POINTER is consistent with the current compiler settings. Also the offset values used by assembler code are verfied.
* powerpc: Add more BUCSR register valuesSebastian Huber2012-11-211-0/+8
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* score: Add INTERNAL_ERROR_CPU_ISR_INSTALL_VECTORSebastian Huber2012-11-152-0/+34
| | | | | Use INTERNAL_ERROR_CPU_ISR_INSTALL_VECTOR on PowerPC for _CPU_ISR_install_vector().
* powerpc: Delete _CPU_Install_interrupt_stack()Sebastian Huber2012-11-141-11/+0
| | | | This function is only used if CPU_HAS_HARDWARE_INTERRUPT_STACK == TRUE.
* powerpc/cpu.h: Define CPU_SIMPLE_VECTORED_INTERRUPTS and remove ↵Joel Sherrill2012-06-111-2/+14
| | | | _CPU_ISR_Initialize
* powerpc: Simplify context switchSebastian Huber2012-06-042-146/+134
| | | | | | | | | | | | | | | | | | | PowerPC cores with the SPE (Signal Processing Extension) have 64-bit general-purpose registers. The SPE context switch code has been merged with the standard context switch code. The context switch may use cache operations to increase the performance. It will be ensured that the context is 32-byte aligned (PPC_DEFAULT_CACHE_LINE_SIZE). This increases the overall memory size of the context area in the thread control block slightly. The general-purpose registers GPR2 and GPR13 are no longer part of the context. The BSP must initialize these registers during startup (usually initialized by the __eabi() function). The new BSP option BSP_USE_DATA_CACHE_BLOCK_TOUCH can be used to enable the dcbt instruction in the context switch. The new BSP option BSP_USE_SYNC_IN_CONTEXT_SWITCH can be used to enable sync and isync instructions in the context switch. This should be not necessary in most cases.
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-117-16/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* Score ISR - Minimize Capabilities When Not Simple VectoredJoel Sherrill2012-05-091-4/+6
| | | | | | | | | | | In particular CPU_INTERRUPT_NUMBER_OF_VECTORS and CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER are only used on Simple Vectored Architectures, so do not depend on them being defined. This disables as much as possible that is specific to the Simple Vectored Model and not expected to be used on architectures which use the Programmable Interrupt Controller model for interrupt handler vectoring.
* Revert: Remove CVS IdsJoel Sherrill2012-05-071-0/+4
| | | | | See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html for details.
* Remove CVS-Ids.Ralf Corsépius2012-05-041-4/+0
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* Add Virtex4 and Virtex5 BSPsRic Claus2012-03-301-1/+78
| | | | | | | | | | | | | | | | | This commit covers at least PR2020, 2022, and 2023. This patch adds all of the code for both BSPs, modifications to libcpu/powerpc for the ppc440, and some updates to the BSPs from follow up review and testing. These BSPs should be good baselines for future development. The configurations used by Ric are custom and have a non-standard NIC. They also do not have a UART. Thus the current console driver just prints to a RAM buffer. The NIC and UART support are left for future work. When the UART support is added, moving the existing "to RAM" console driver to a shared location is likely desirable because boards with no debug UART port are commonly deployed. This would let printk() go to RAM.
* Remove all .cvsignore files.Joel Sherrill2012-02-011-2/+0
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* 2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-12-062-0/+39
| | | | * rtems/powerpc/registers.h: More register defines.
* 2011-09-27 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-272-0/+7
| | | | | PR 1914/cpukit * rtems/score/cpu.h: Select timestamp implementation.
* 2011-08-30 Peter Dufault <dufault@hda.com>Sebastian Huber2011-08-302-0/+33
| | | | | * rtems/score/cpu.h: Add more context access functionality. Needed to get GDB debugger hooks working.
* 2011-08-24 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-08-242-8/+14
| | | | | | * rtems/powerpc/registers.h: Renamed defines XER in PPC_XER, LR in PPC_LR, CTR in PPC_CTR, PVR in PPC_PVR, RPA in PPC_RPA, DAR in PPC_DAR, DEC in PPC_DEC, and EAR in PPC_EAR.
* 2011-07-21 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-07-212-16/+102
| | | | * rtems/score/cpu.h: Added SPE support to CPU context.
* 2011-05-17 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2011-05-172-2/+7
| | | | * Makefile.am: Reformat.
* 2011-05-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-05-112-0/+8
| | | | * rtems/powerpc/registers.h: Added FSL_EIS_SVR define.
* 2011-02-16 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-02-162-0/+14
| | | | | * rtems/powerpc/registers.h: Added FSL_EIS_ATBL, FSL_EIS_ATBL, and FSL_EIS_SPEFSCR defines.
* 2011-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-02-152-0/+9
| | | | | * rtems/powerpc/registers.h: Added MSR_UCLE, MSR_SPE, MSR_WE, and MSR_UBLE defines.
* 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2011-02-113-9/+14
| | | | | * rtems/powerpc/registers.h, rtems/score/cpu.h: Use "__asm__" instead of "asm" for improved c99-compliance.
* 2011-01-31 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-01-312-19/+87
| | | | | * rtems/powerpc/registers.h: Changed Freescale EIS prefix. More Freescale EIS defines. Added MSR_IS, MSR_DS, and MSR_PMM defines.
* 2011-01-28 Joel Sherrill <joel.sherrilL@OARcorp.com>Joel Sherrill2011-01-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | * include/rtems/bspIo.h, include/rtems/concat.h, include/rtems/irq.h, score/cpu/i386/rtems/score/idtr.h, score/cpu/powerpc/rtems/powerpc/registers.h, score/src/objectidtoname.c, score/src/schedulerpriorityblock.c, score/src/schedulerpriorityschedule.c, score/src/schedulerpriorityunblock.c, score/src/schedulerpriorityyield.c, score/src/thread.c, score/src/threadchangepriority.c, score/src/threadclearstate.c, score/src/threadclose.c, score/src/threadcreateidle.c, score/src/threaddelayended.c, score/src/threaddispatch.c, score/src/threadget.c, score/src/threadhandler.c, score/src/threadinitialize.c, score/src/threadloadenv.c, score/src/threadready.c, score/src/threadreset.c, score/src/threadrestart.c, score/src/threadresume.c, score/src/threadsetpriority.c, score/src/threadsetstate.c, score/src/threadsettransient.c, score/src/threadstackallocate.c, score/src/threadstackfree.c, score/src/threadstart.c, score/src/threadstartmultitasking.c, score/src/threadsuspend.c, score/src/threadtickletimeslice.c, score/src/threadyieldprocessor.c: Fix typo where license said found in found in.
* 2011-01-26 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-01-262-0/+5
| | | | * rtems/powerpc/registers.h: Added BOOKE_PIR define.
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