summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/powerpc/rtems (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Remove make preinstallChris Johns2018-01-257-2851/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
* powerpc: Add FSL_EIS_EPRSebastian Huber2018-01-221-0/+1
| | | | Update #3085.
* powerpc: Remove _BSP_Fatal_error()Sebastian Huber2017-11-221-13/+12
| | | | | | | BSPs can use the bsp_fatal_extension() to provide BSP-specific fatal error handling. There is no need for a _BSP_Fatal_error(). Close #3246.
* powerpc: Replace BSP_panic() with rtems_panic()Sebastian Huber2017-11-221-2/+0
| | | | | | | | Due to a new rtems_panic() implementation, it is possible to replace the PowerPC-specific BSP_panic() with rtems_panic(). Remove BSP_panic() implementations. Close #3245.
* bsps/powerpc: Fix PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber2017-11-201-2/+2
| | | | | | For the SPE support we must store the upper half of r3 as well. Update #3085.
* powerpc: PPC64_NOP_FOR_LINKER_TOC_POINTER_RESTORESebastian Huber2017-08-221-0/+5
| | | | | | | In 64-bit mode, the linker must have the ability to restore the TOC pointer after an external function call. Update #3082.
* powerpc: Add 64-bit context/interrupt supportSebastian Huber2017-08-223-90/+143
| | | | Update #3082.
* powerpc: 64-bit _CPU_Context_Initialize() supportSebastian Huber2017-08-221-2/+2
| | | | Update #3082.
* powerpc: 64-bit support for CPU_SIZEOF_POINTERSebastian Huber2017-08-221-0/+4
| | | | Update #3082.
* powerpc: ppc_interrupt_get_disable_mask()Sebastian Huber2017-08-221-1/+1
| | | | | | Fix warning on 64-bit PowerPC. Update #3082.
* powerpc: Add register definesSebastian Huber2017-08-221-0/+16
| | | | Update #3082.
* powerpc: Add register definesSebastian Huber2017-07-311-0/+26
| | | | | Update #3082. Update #3085.
* bsp/t32mppc: Add SMP supportSebastian Huber2017-07-281-0/+3
|
* powerpc: Fix PPC_CONTEXT_VOLATILE_SIZESebastian Huber2017-06-201-0/+4
| | | | Account for legacy AltiVec context.
* powerpc: Fix TLS supportSebastian Huber2017-06-201-10/+11
| | | | | Do not zero the GPR2 in the thread context via dcbz instructions. Bug was introduced by 32b4a0c42704f0076da8e2d5411290f55d1b2965.
* powerpc: Fix PPC_CONTEXT_VOLATILE_SIZESebastian Huber2017-03-061-1/+1
|
* score: Delete _CPU_Context_Fp_start()Sebastian Huber2017-01-261-17/+0
| | | | | | | | | | Since the FP area pointer is passed by reference in _CPU_Context_Initialize_fp() the optional FP area adjustment via _CPU_Context_Fp_start() is superfluous. It is also wrong with respect to memory management, e.g. pointer passed to _Workspace_Free() may be not the one returned by _Workspace_Allocate(). Close #1400.
* Remove CPU_BIG_ENDIAN and CPU_LITTLE_ENDIANSebastian Huber2017-01-241-13/+0
| | | | | | Use de-facto standard BYTE_ORDER instead. Close #2803.
* score: Robust thread dispatchSebastian Huber2016-11-231-0/+2
| | | | | | | | | | | | On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811.
* score: Add _ISR_Is_enabled()Sebastian Huber2016-11-181-0/+5
| | | | | | | In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates a level parameter and returns a boolean value. Update #2811.
* powerpc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2016-11-181-2/+4
| | | | Update #2751.
* powerpc: Add up to date CPU_Interrupt_frameSebastian Huber2016-11-181-1/+164
| | | | | | | Rename ppc_exc_min_frame to CPU_Interrupt_frame. Move it and the corresponding defines to <rtems/score/cpuimpl.h>. Update #2809.
* powerpc: Move legacy CPU_Interrupt_frameSebastian Huber2016-11-181-31/+0
| | | | | | | The only remaining user of CPU_Interrupt_frame on PowerPC is the mpc5xx support. Move it to here. Update #2809.
* rtems: Conditionally define rtems_interrupt_frameSebastian Huber2016-11-181-1/+1
| | | | Update #2808.
* score: Move CPU_PER_CPU_CONTROL_SIZESebastian Huber2016-11-182-3/+3
| | | | | Move CPU_PER_CPU_CONTROL_SIZE and the optional CPU_Per_CPU_control to <rtems/score/cpuimpl.h> to hide it from <rtems.h>.
* score: Remove obsolete definesSebastian Huber2016-11-181-19/+0
| | | | The thread dispatch inline option is no longer used.
* powerpc: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2016-11-101-0/+27
| | | | | | | | Add _CPU_Get_current_per_CPU_control() on SMP configurations. Use SPRG0 for the current per-CPU control. This reduces the code size by three instructions and is slightly faster. Update #2805.
* score: Add <rtems/score/cpuimpl.h>Sebastian Huber2016-11-071-0/+30
| | | | | | The aim of this file is to encapsulate CPU port implementation details. This helps to hide implementation details from <rtems.h> which indirectly includes <rtems/score/cpu.h>.
* score: Fix C/C++ compatibility issueSebastian Huber2016-09-231-4/+0
| | | | | | | Only use CPU_Per_CPU_control if it contains at least one filed. In GNU C empty structures have a size of zero. In C++ structures have a non-zero size. In case CPU_PER_CPU_CONTROL_SIZE is defined to zero, then this structure is not used anymore.
* stackchk: Use a const pattern to checkSebastian Huber2016-09-081-1/+9
|
* score: Simplify priority bit map implementationSebastian Huber2016-06-082-2/+2
| | | | | | | | | | The priority bit map can deal with a maximum of 256 priority values ranging from 0 to 255. Consistently use an unsigned int for computation, due to the usual integer promotion rules. Make Priority_bit_map_Word definition architecture-independent and define it to uint16_t. This was already the case for all architectures except PowerPC. Adjust the PowerPC bitmap support accordingly.
* score: Delete CPU_USE_GENERIC_BITFIELD_DATASebastian Huber2016-06-081-2/+0
| | | | | | Rename __log2table into _Bitfield_Leading_zeros since it acually returns the count of leading zeros of an 8-bit integer. The value for zero is a bit odd. Provide it unconditionally.
* powerpc: Define bitmap defines to FALSESebastian Huber2016-06-081-0/+4
|
* powerpc: Add FSL_EIS_TENSR, etc. definesSebastian Huber2016-04-221-0/+7
|
* powerpc: Add FSL_EIS_MAS8Sebastian Huber2016-04-131-0/+2
|
* score: Add CPU_MAXIMUM_PROCESSORSSebastian Huber2016-03-041-0/+2
| | | | Maximum number of processors of all systems supported by this CPU port.
* score: Introduce CPU_CACHE_LINE_BYTESSebastian Huber2016-01-261-21/+2
| | | | | Add CPU_CACHE_LINE_BYTES for the maximum cache line size in bytes. The actual processor may use no cache or a smaller cache line size.
* score: Delete obsolete CPU_TIMESTAMP_* definesSebastian Huber2016-01-251-2/+0
| | | | Update #2271.
* powerpc: Fix alignment for AltiVec multilibsSebastian Huber2016-01-121-2/+6
|
* powerpc: Add FSL cache definesSebastian Huber2015-10-281-0/+10
|
* basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber2015-10-261-1/+1
|
* powerpc: Use wrtee for e6500 multilibSebastian Huber2015-10-021-0/+17
| | | | This reduces the code size.
* powerpc: Do not use the ATB for e500 multilibSebastian Huber2015-07-151-1/+1
| | | | | | The e500v1 has no support for the ATB. Update #2369.
* powerpc: Fix _CPU_Counter_read()Nick Withers2015-07-151-1/+1
| | | | | | The mftb is not available on Book E processors. Use SPR 268 instead. Close #2369.
* powerpc: Add BUCSR register definesSebastian Huber2015-07-081-0/+2
|
* cpukit: add and use CPU_Uint32ptr typeGedare Bloom2015-03-161-0/+4
|
* score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber2015-03-051-20/+0
|
* score: Add _CPU_SMP_Prepare_start_multitasking()Sebastian Huber2015-02-171-0/+2
| | | | Update #2268.
* powerpc: Fix AltiVec VSCR save/restoreSebastian Huber2015-01-201-1/+4
|
* powerpc: AltiVec and FPU context supportSebastian Huber2015-01-132-6/+182
| | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-19 03:36:26 +0000