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* score: Delete obsolete CPU_TIMESTAMP_* definesSebastian Huber2016-01-251-2/+0
| | | | Update #2271.
* powerpc: Fix alignment for AltiVec multilibsSebastian Huber2016-01-121-2/+6
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* basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber2015-10-261-1/+1
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* powerpc: Do not use the ATB for e500 multilibSebastian Huber2015-07-151-1/+1
| | | | | | The e500v1 has no support for the ATB. Update #2369.
* powerpc: Fix _CPU_Counter_read()Nick Withers2015-07-151-1/+1
| | | | | | The mftb is not available on Book E processors. Use SPR 268 instead. Close #2369.
* cpukit: add and use CPU_Uint32ptr typeGedare Bloom2015-03-161-0/+4
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* score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber2015-03-051-20/+0
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* score: Add _CPU_SMP_Prepare_start_multitasking()Sebastian Huber2015-02-171-0/+2
| | | | Update #2268.
* powerpc: Fix AltiVec VSCR save/restoreSebastian Huber2015-01-201-1/+4
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* powerpc: AltiVec and FPU context supportSebastian Huber2015-01-132-6/+182
| | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
* powerpc: Use PPC_HAS_FPUSebastian Huber2015-01-091-0/+2
| | | | Provide floating point context support only if PPC_HAS_FPU == 1.
* powerpc: Add PPC_STACK_ALIGN_POWERSebastian Huber2015-01-091-16/+6
| | | | Simplify PPC_STACK_ALIGNMENT definition.
* powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500Sebastian Huber2015-01-092-6/+12
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* powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZESebastian Huber2015-01-092-3/+4
| | | | | Use it for the default PPC_CACHE_ALIGNMENT. Use it for PPC_STRUCTURE_ALIGNMENT.
* powerpc: Delete _CPU_IRQ_infoSebastian Huber2015-01-091-16/+0
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* powerpc: Use alternate time base for CPU counterSebastian Huber2015-01-091-3/+3
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* powerpc: Use CPU_TIMESTAMP_USE_STRUCT_TIMESPECSebastian Huber2014-09-231-1/+1
| | | | | | | Converting 64-bit nanoseconds values into the common struct timeval or struct timespec formats requires a 64-bit division to get the seconds value. Performance analysis of high network loads revealed that this is too costly on PowerPC.
* score: Rename _BSP_Exception_frame_print()Sebastian Huber2014-09-111-8/+1
| | | | | Rename _BSP_Exception_frame_print() to _CPU_Exception_frame_print() to be in line with other CPU port functions.
* powerpc: Delete PPC_BSP_HAS_FIXED_PR288Sebastian Huber2014-09-111-7/+0
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* Let CPU/BSP Fatal handler have access to sourceDaniel Hellstrom2014-09-101-1/+1
| | | | | | | | | Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
* score: PR2183: Fix context switch on SMPSebastian Huber2014-07-041-1/+1
| | | | | | | | Fix context switch on SMP for ARM, PowerPC and SPARC. Atomically test and set the is executing indicator of the heir context to ensure that at most one processor uses the heir context. Break the busy wait loop also due to heir updates.
* score: Fix CPU context usage on SMPSebastian Huber2014-05-081-2/+14
| | | | | | | | | | We must not alter the is executing indicator in _CPU_Context_Initialize() since this would cause an invalid state during a self restart. The is executing indicator must be valid at creation time since otherwise _Thread_Kill_zombies() uses an undefined value for not started threads. This could result in a system life lock.
* score: Implement forced thread migrationSebastian Huber2014-05-071-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of task migration in RTEMS has some implications with respect to the interrupt latency. It is crucial to preserve the system invariant that a task can execute on at most one processor in the system at a time. This is accomplished with a boolean indicator in the task context. The processor architecture specific low-level task context switch code will mark that a task context is no longer executing and waits that the heir context stopped execution before it restores the heir context and resumes execution of the heir task. So there is one point in time in which a processor is without a task. This is essential to avoid cyclic dependencies in case multiple tasks migrate at once. Otherwise some supervising entity is necessary to prevent life-locks. Such a global supervisor would lead to scalability problems so this approach is not used. Currently the thread dispatch is performed with interrupts disabled. So in case the heir task is currently executing on another processor then this prolongs the time of disabled interrupts since one processor has to wait for another processor to make progress. It is difficult to avoid this issue with the interrupt latency since interrupts normally store the context of the interrupted task on its stack. In case a task is marked as not executing we must not use its task stack to store such an interrupt context. We cannot use the heir stack before it stopped execution on another processor. So if we enable interrupts during this transition we have to provide an alternative task independent stack for this time frame. This issue needs further investigation.
* score: Statically initialize _ISR_Vector_tableSebastian Huber2014-04-291-10/+0
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* score: SMP initialization changesSebastian Huber2014-04-141-1/+5
| | | | | | | | | | | | | | | | | Add and use _CPU_SMP_Start_processor(). Add and use _CPU_SMP_Finalize_initialization(). This makes most _CPU_SMP_Initialize() functions a bit simpler since we can calculate the minimum value of the count of processors requested by the application configuration and the count of physically or virtually available processors in the high-level code. The CPU port has now the ability to signal a processor start failure. With the support for clustered/partitioned scheduling the presence of particular processors can be configured to be optional or mandatory. There will be a fatal error only in case mandatory processors are not present. The CPU port may use a timeout to monitor the start of a processor.
* score: Rename Priority_bit_map_ControlSebastian Huber2014-04-032-2/+2
| | | | Rename Priority_bit_map_Control in Priority_bit_map_Word.
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-214-4/+4
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* score: _CPU_SMP_Get_current_processor()Sebastian Huber2014-02-211-3/+2
| | | | | | | Remove RTEMS_COMPILER_PURE_ATTRIBUTE from _SMP_Get_current_processor() and all _CPU_SMP_Get_current_processor(). Make inline ASM statements volatile again. Test smptests/smpmigration01 showed that GCC optimizes too much otherwise.
* score: Rename bsp_smp_initialize()Sebastian Huber2014-02-191-0/+2
| | | | | Rename bsp_smp_initialize() into _CPU_SMP_Initialize() since every CPU port must supply this function.
* score: Use atomic API for SMP lockSebastian Huber2014-02-171-95/+0
| | | | | Use a ticket lock implementation based on atomic operations. Delete CPU port specific SMP lock implementations.
* score: Remove volatile from asm statementsSebastian Huber2014-02-141-1/+1
| | | | | The instructions to get the processor current index have no side-effects.
* score: Add CPU counter supportSebastian Huber2014-02-141-0/+24
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* score: _CPU_Context_switch_to_first_task_smp()Sebastian Huber2014-02-051-3/+0
| | | | | Delete _CPU_Context_switch_to_first_task_smp() and use _CPU_Context_restore() instead.
* Add thread-local storage (TLS) supportSebastian Huber2014-02-041-1/+2
| | | | | Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
* powerpc: Add r2 to CPU contextSebastian Huber2013-11-181-2/+8
| | | | The r2 may be used for thread-local storage.
* score: Simplify <rtems/score/cpuatomic.h>WeiY2013-08-281-30/+6
| | | | Add proper license and copyright.
* score/cpu: Add CPU_Per_CPU_controlSebastian Huber2013-08-091-0/+6
| | | | Add CPU port specific per-CPU control.
* smp: Rename _CPU_Processor_event_receive()Sebastian Huber2013-07-171-1/+1
| | | | Rename to _CPU_SMP_Processor_event_receive().
* smp: Rename _CPU_Processor_event_broadcast()Sebastian Huber2013-07-171-1/+1
| | | | Rename to _CPU_SMP_Processor_event_broadcast().
* smp: Add and use _CPU_SMP_Send_interrupt()Sebastian Huber2013-07-171-0/+1
| | | | Delete bsp_smp_interrupt_cpu().
* smp: Add and use _CPU_SMP_Get_current_processor()Sebastian Huber2013-07-171-0/+15
| | | | | | | | | | Add and use _SMP_Get_current_processor() and rtems_smp_get_current_processor(). Delete bsp_smp_interrupt_cpu(). Change type of current processor index from int to uint32_t to match _SMP_Processor_count type.
* update-all-architectures-to-new-atomic-implementationWeiY2013-07-171-509/+10
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* powerpc: Fix Altivec supportSebastian Huber2013-06-261-4/+4
| | | | Use the right context.
* smp: Add PowerPC supportSebastian Huber2013-05-312-1/+111
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* score: Add CPU context validationSebastian Huber2013-05-101-0/+4
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* score: atomic support for RTEMS. Cleanup.WeiY2013-02-071-38/+38
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* score: atomic support for RTEMS. Atomic operations for PowerPC.WeiY2013-02-071-0/+537
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* score: Doxygen Clean Up Task #5Alex Ivanov2013-01-023-9/+15
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* score: Add CPU_Exception_frameSebastian Huber2012-11-271-0/+9
| | | | | | | | | | | | | | | | | | | | | Add CPU port type CPU_Exception_frame and function _CPU_Exception_frame_print(). The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh, sparc64, and v850 use an empty default implementation of _CPU_Exception_frame_print(). Add rtems_exception_frame and rtems_exception_frame_print(). Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal() with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc, and sparc for unexpected exceptions. Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the BSP_PRINT_EXCEPTION_CONTEXT define used in the default bsp_fatal_extension(). Add test sptests/spfatal26.
* powerpc: Add CPU_Exception_frameSebastian Huber2012-11-271-0/+46
| | | | | The powerpc port uses now a unified CPU_Exception_frame. This resulted in a CPU_Exception_frame layout change for the MPC5XX.
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