summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/nios2/rtems/score/cpu.h (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Remove make preinstallChris Johns2018-01-251-372/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
* Remove CPU_BIG_ENDIAN and CPU_LITTLE_ENDIANSebastian Huber2017-01-241-4/+0
| | | | | | Use de-facto standard BYTE_ORDER instead. Close #2803.
* score: Robust thread dispatchSebastian Huber2016-11-231-0/+2
| | | | | | | | | | | | On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811.
* score: Add _ISR_Is_enabled()Sebastian Huber2016-11-181-0/+2
| | | | | | | In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates a level parameter and returns a boolean value. Update #2811.
* score: Move CPU_PER_CPU_CONTROL_SIZESebastian Huber2016-11-181-2/+0
| | | | | Move CPU_PER_CPU_CONTROL_SIZE and the optional CPU_Per_CPU_control to <rtems/score/cpuimpl.h> to hide it from <rtems.h>.
* score: Remove obsolete definesSebastian Huber2016-11-181-5/+0
| | | | The thread dispatch inline option is no longer used.
* score: Fix C/C++ compatibility issueSebastian Huber2016-09-231-4/+0
| | | | | | | Only use CPU_Per_CPU_control if it contains at least one filed. In GNU C empty structures have a size of zero. In C++ structures have a non-zero size. In case CPU_PER_CPU_CONTROL_SIZE is defined to zero, then this structure is not used anymore.
* score: Delete CPU_USE_GENERIC_BITFIELD_DATASebastian Huber2016-06-081-2/+0
| | | | | | Rename __log2table into _Bitfield_Leading_zeros since it acually returns the count of leading zeros of an 8-bit integer. The value for zero is a bit odd. Provide it unconditionally.
* score: Add CPU_MAXIMUM_PROCESSORSSebastian Huber2016-03-041-0/+2
| | | | Maximum number of processors of all systems supported by this CPU port.
* score: Introduce CPU_CACHE_LINE_BYTESSebastian Huber2016-01-261-1/+5
| | | | | Add CPU_CACHE_LINE_BYTES for the maximum cache line size in bytes. The actual processor may use no cache or a smaller cache line size.
* score: Delete obsolete CPU_TIMESTAMP_* definesSebastian Huber2016-01-251-2/+0
| | | | Update #2271.
* basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber2015-10-261-2/+2
|
* score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber2015-03-051-5/+0
|
* Let CPU/BSP Fatal handler have access to sourceDaniel Hellstrom2014-09-101-1/+2
| | | | | | | | | Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
* score: Statically initialize _ISR_Vector_tableSebastian Huber2014-04-291-1/+1
|
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-211-1/+1
|
* score: Add CPU counter supportSebastian Huber2014-02-141-0/+12
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* Add thread-local storage (TLS) supportSebastian Huber2014-02-041-1/+3
| | | | | Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
* score/cpu: Add CPU_Per_CPU_controlSebastian Huber2013-08-091-0/+6
| | | | Add CPU port specific per-CPU control.
* score: Add CPU context validationSebastian Huber2013-05-101-0/+4
|
* nios2: Set CPU_ISR_PASSES_FRAME_POINTER to FALSEJeffrey O. Hill2013-03-111-22/+2
| | | | | This reflects what is currently happening. Define CPU_Interrupt_frame type to void to prevent accidental usage.
* score: Doxygen Clean Up Task #16Alex Ivanov2013-01-081-8/+11
|
* score misc: Clean up Doxygen #13 (GCI 2012)Mathew Kallada2012-12-021-1/+13
| | | | | | | This patch is a task from GCI 2012 which improves the Doxygen comments in the RTEMS source. http://www.google-melange.com/gci/task/view/google/gci2012/8013205
* score: Add CPU_Exception_frameSebastian Huber2012-11-271-0/+2
| | | | | | | | | | | | | | | | | | | | | Add CPU port type CPU_Exception_frame and function _CPU_Exception_frame_print(). The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh, sparc64, and v850 use an empty default implementation of _CPU_Exception_frame_print(). Add rtems_exception_frame and rtems_exception_frame_print(). Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal() with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc, and sparc for unexpected exceptions. Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the BSP_PRINT_EXCEPTION_CONTEXT define used in the default bsp_fatal_extension(). Add test sptests/spfatal26.
* score: PR1607: Add and use CPU_SIZEOF_POINTERSebastian Huber2012-11-221-0/+2
| | | | | | | | | | | | | | | | | Add and use new CPU port define CPU_SIZEOF_POINTER. It must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code. The size of a pointer is part of the application binary interface (ABI) and thus independent of the actual programming language. The compiler will provide defines to determine the current ABI. We use these defines to select the appropriate CPU_SIZEOF_POINTER value. Static assertions in the new file "cpukit/score/src/percpuasm.c" will ensure that the value of CPU_SIZEOF_POINTER is consistent with the current compiler settings. Also the offset values used by assembler code are verfied.
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* 2011-09-27 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-271-0/+2
| | | | | PR 1914/cpukit * rtems/score/cpu.h: Select timestamp implementation.
* 2011-09-16 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-161-0/+2
| | | | | | | | * nios2-eic-il-low-level.S, nios2-eic-rsie-low-level.S: New files. * Makefile.am: Reflect changes above. * rtems/score/cpu.h, rtems/score/nios2-utility.h, nios2-thread-dispatch-disabled.c, nios2-context-switch.S: Added support for thread stack protection via the MPU.
* 2011-09-14 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-141-4/+1
| | | | | * rtems/score/cpu.h: Request cache alignment and small data area in CPU_STRUCTURE_ALIGNMENT.
* 2011-09-01 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-011-75/+97
| | | | | | | | | | | | | | | | * cpu.c, cpu_asm.S: Removed files. * nios2-context-initialize.c, nios2-context-switch.S, nios2-fatal-halt.c, nios2-initialize-vectors.c, nios2-initialize.c, nios2-isr-get-level.c, nios2-isr-install-raw-handler.c, nios2-isr-install-vector.c, nios2-isr-is-in-progress.c, nios2-isr-set-level.c, nios2-thread-dispatch-disabled.c, rtems/score/nios2-utility.h: New files. * Makefile.am, preinstall.am: Reflect changes above. * irq.c: Update due to API changes. * rtems/score/cpu.h: New functions _CPU_Initialize_vectors(), _CPU_ISR_Set_level(), and _CPU_Fatal_halt() (instead of macros). Support for external interrupt controller (EIC). Documentation changes.
* 2011-08-18 Chris Johns <chrisj@rtems.org>Chris Johns2011-08-181-12/+73
| | | | | | | | | | | | * cpu.c: Fix the ISR get level for the IIC. Make _CPU_Context_Initialize a function rather than inlined. * cpu_asm.S: Do not enable interrupt on return, rather resume the state on entry to the ISR. * irq.c, nios2/nios2-iic-low-level.S: Change the ISR handler so the ipending decoding is in C and within the interrupt context. This is usable with the Altera HAL directly. * rtems/score/cpu.h: Add ienable and ipending interfaces. Add some comments. Remove _CPU_Context_Initialize.
* 2011-08-14 Chris Johns <chrisj@rtems.org>Chris Johns2011-08-141-0/+5
| | | | | | * rtems/score/cpu.h: Clear the vector table for simple vectored interrupts. * irq.c: Add support for using the IIC with the Altera HAL.
* 2011-08-10 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-08-101-1157/+137
| | | | | | * rtems/score/cpu.h: Removed superfluous comments. Format. Include by assembler support. Removed superfluous floating-point support. Stack alignment is now 4.
* 2011-08-10 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-08-101-14/+1
| | | | * rtems/score/cpu.h, cpu.c: Removed superfluous functions.
* 2011-08-09 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-08-091-21/+19
| | | | | | * cpu_asm.S, rtems/score/cpu.h: There is no need to save the global pointer (gp) in the thread register context since it is a system wide constant and set-up with the C runtime environment.
* 2010-10-21 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-10-211-1/+1
| | | | | | * rtems/score/cpu.h: Add RTEMS_COMPILER_NO_RETURN_ATTRIBUTE to _CPU_Context_restore() because it does not return. Telling GCC this avoids generation of dead code.
* 2010-07-29 Gedare Bloom <giddyup44@yahoo.com>Joel Sherrill2010-07-291-1/+1
| | | | | | | | | | | PR 1635/cpukit * rtems/score/cpu.h, rtems/score/types.h: Refactoring of priority handling, to isolate the bitmap implementation of priorities in the supercore so that priority management is a little more modular. This change is in anticipation of scheduler implementations that can select how they manage tracking priority levels / finding the highest priority ready task. Note that most of the changes here are simple renaming, to clarify the use of the bitmap-based priority management.
* 2010-07-16 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2010-07-161-3/+1
| | | | | * rtems/score/cpu.h: Include <rtems/score/types.h> first. * rtems/score/types.h: Use <rtems/score/basedefs.h> header file.
* 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-06-291-14/+0
| | | | | | | | PR 1573/cpukit * irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains the information required by RTEMS for each CPU core. This encapsulates information such as thread executing, heir, idle and dispatch needed.
* Whitespace removal.Ralf Corsepius2009-12-021-16/+16
|
* 2009-02-12 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2009-02-121-1/+1
| | | | | * cpu.c, rtems/score/cpu.h: Change prototype of IDLE thread to consistently return void * and take a uintptr_t argument.
* 2009-02-11 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2009-02-111-22/+1
| | | | | | * cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and passing address of _Thread_Dispatch to _CPU_Initialize. Clean up comments.
* 2008-09-10 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-09-101-0/+1347
| | | | | | | | | | | | | | | | | | | | * configure.ac, aclocal/canonical-target-name.m4: Readd NIOS2 and TI C4x. Accidentally not done on 4.9 branch. :( * score/cpu/c4x/.cvsignore, score/cpu/c4x/ChangeLog, score/cpu/c4x/Makefile.am, score/cpu/c4x/cpu.c, score/cpu/c4x/cpu_asm.S, score/cpu/c4x/irq.c, score/cpu/c4x/preinstall.am, score/cpu/c4x/rtems/asm.h, score/cpu/c4x/rtems/score/c4x.h, score/cpu/c4x/rtems/score/cpu.h, score/cpu/c4x/rtems/score/cpu_asm.h, score/cpu/c4x/rtems/score/types.h, score/cpu/c4x/rtems/tic4x/c4xio.h, score/cpu/nios2/.cvsignore, score/cpu/nios2/ChangeLog, score/cpu/nios2/Makefile.am, score/cpu/nios2/cpu.c, score/cpu/nios2/cpu_asm.S, score/cpu/nios2/irq.c, score/cpu/nios2/preinstall.am, score/cpu/nios2/rtems/asm.h, score/cpu/nios2/rtems/score/cpu.h, score/cpu/nios2/rtems/score/cpu_asm.h, score/cpu/nios2/rtems/score/nios2.h, score/cpu/nios2/rtems/score/types.h: New files.
* 2008-09-10 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-09-101-1347/+0
| | | | | | | | | | | | | | | | | | | | * configure.ac, aclocal/canonical-target-name.m4, score/cpu/Makefile.am: Remove TI C4x and NIOS2 ports from 4.9 branch. * score/cpu/c4x/.cvsignore, score/cpu/c4x/ChangeLog, score/cpu/c4x/Makefile.am, score/cpu/c4x/cpu.c, score/cpu/c4x/cpu_asm.S, score/cpu/c4x/irq.c, score/cpu/c4x/preinstall.am, score/cpu/c4x/rtems/asm.h, score/cpu/c4x/rtems/score/c4x.h, score/cpu/c4x/rtems/score/cpu.h, score/cpu/c4x/rtems/score/cpu_asm.h, score/cpu/c4x/rtems/score/types.h, score/cpu/c4x/rtems/tic4x/c4xio.h, score/cpu/nios2/.cvsignore, score/cpu/nios2/ChangeLog, score/cpu/nios2/Makefile.am, score/cpu/nios2/cpu.c, score/cpu/nios2/cpu_asm.S, score/cpu/nios2/irq.c, score/cpu/nios2/preinstall.am, score/cpu/nios2/rtems/asm.h, score/cpu/nios2/rtems/score/cpu.h, score/cpu/nios2/rtems/score/cpu_asm.h, score/cpu/nios2/rtems/score/nios2.h, score/cpu/nios2/rtems/score/types.h: Removed.
* 2008-09-08 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2008-09-081-1/+1
| | | | * rtems/score/cpu.h: Remove extraneous spaces.
* 2008-07-31 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-07-311-1/+1
| | | | * cpu.c, rtems/score/cpu.h: Correct prototype of Idle threads.
* 2008-06-05 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-06-051-0/+13
| | | | | | | | * rtems/score/cpu.h: Add CPU_SIMPLE_VECTORED_INTERRUPTS porting parameter to indicate that the port uses the Simple Vectored Interrupt model or the Programmable Interrupt Controller Model. The PIC model is implemented primarily in the BSP and it is responsible for all memory allocation.
* 2007-12-17 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2007-12-171-0/+3
| | | | * rtems/score/cpu.h: Add _CPU_Context_Get_SP() for stack check utility.
* 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-041-25/+0
| | | | | | * cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU Table to Configuration Table. Eliminate CPU Table from all ports. Delete references to CPU Table in all forms.
* 2007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-031-48/+0
| | | | | | | | | * rtems/score/cpu.h: Moved most of the remaining CPU Table fields to the Configuration Table. This included pretasking_hook, predriver_hook, postdriver_hook, idle_task, do_zero_of_workspace, extra_mpci_receive_server_stack, stack_allocate_hook, and stack_free_hook. As a side-effect of this effort some multiprocessing code was made conditional and some style clean up occurred.