| Commit message (Collapse) | Author | Age | Files | Lines |
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* rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
register constraints from "general" to "register".
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* cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
to make it easier to conditionalize the code for various ISA levels.
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* idtcpu.h: Commented out definition of "wait". It was stupid to
use such a common word as a macro.
* rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
* rtems/score/mips.h: Added include of <idtcpu.h>.
* rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
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* cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
Previous code resulting in the interrupted immediately returning
to the caller of the routine it was inside.
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* cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
because it has not been allocated yet.
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* cpu.c: Removed duplicate declaration for _ISR_Vector_table.
* cpu_asm.S: Removed assembly language to vector ISR handler
on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP.
* rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
longer a constant -- get the real value from libcpu.
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* cpu_asm.h: Removed.
* Makefile.am: Remove cpu_asm.h.
* rtems/score/mips64orion.h: Renamed mips.h.
* rtems/score/mips.h: New file, formerly mips64orion.h.
Header rewritten.
(mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
mips_disable_in_interrupt_mask): New macros.
* rtems/score/Makefile.am: Reflect renaming mips64orion.h.
* asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
few defines that were in <cpu_asm.h>.
* cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
MIPS ISA 3 is still in assembly for now.
(_CPU_Thread_Idle_body): Rewrote in C.
* cpu_asm.S: Rewrote file header.
(FRAME,ENDFRAME) now in asm.h.
(_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
(_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
(_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
leaves other bits in SR alone on task switch.
(mips_enable_interrupts,mips_disable_interrupts,
mips_enable_global_interrupts,mips_disable_global_interrupts,
disable_int, enable_int): Removed.
(mips_get_sr): Rewritten as C macro.
(_CPU_Thread_Idle_body): Rewritten in C.
(init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
placed in libcpu.
(exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
to libcpu/mips/shared/interrupts.
(general): Cleaned up comment blocks and #if 0 areas.
* idtcpu.h: Made ifdef report an error.
* iregdef.h: Removed warning.
* rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
number defined by libcpu.
(_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
to access SR.
(_CPU_ISR_Set_level): Rewritten as macro for ISA I.
(_CPU_Context_Initialize): Honor ISR level in task initialization.
(_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
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* rtems/score/cpu.h: When mips ISA level is 1, registers in the
context should be 32 not 64 bits.
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* cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
correct name of _CPU_Context_switch_restore. Added dummy
version of exc_utlb_code() so applications would link.
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* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
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* Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
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* Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
Switch to GNU canonicalization.
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Joel Sherrill <joel@OARcorp.com>
* This is a major reworking of the mips64orion port to use
gcc predefines as much as possible and a big push to multilib
the mips port. The mips64orion port was copied/renamed to mips
to be more like other GNU tools. Alan did most of the technical
work of determining how to map old macro names used by the mips64orion
port to standard compiler macro definitions. Joel did the merge
with CVS magic to keep individual file history and did the BSP
modifications. Details follow:
* Makefile.am: idtmon.h in mips64orion port not present.
* asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
* cpu.c: Comments added.
* cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added.
First attempt at exception/interrupt processing for ISA level 1
and minus any use of IDT/MON added.
* idtcpu.h: Conditionals changed to use gcc predefines.
* iregdef.h: Ditto.
* cpu_asm.h: No real change. Merger required commit.
* rtems/Makefile.am: Ditto.
* rtems/score/Makefile.am: Ditto.
* rtems/score/cpu.h: Change MIPS64ORION to MIPS.
* rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert
from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
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* Makefile.am: Include compile.am.
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a BSP (c4xsim) supporting the simulator included with gdb. This port
was done by Joel Sherrill and Jennifer Averett of OAR Corporation.
Also included with this port is a space/time optimization to eliminate
FP context switch management on CPUs without hardware or software FP.
An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8)
on this CPU. This required addressing alignment checks and assumptions
as well as fixing code that assumed sizeof(unsigned32) == 4.
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_Interrupt_Manager_initialization.
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adds .cvsignore.
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Ralf Corsepius <corsepiu@faw.uni-ulm.de> that contain:
* Modifications, (minor) corrections, cleanups to most existing
Makefile.ams
* Adds automake support to all remaining BSPs which have not yet been
converted to automake.
* Makefile.am for all remaining wrapup/Makefile.ams
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<corsepiu@faw.uni-ulm.de> which implements automake support for some
score/cpu/<RTEMS_CPU> subdirectories and fixes a few minor configuration
bugs.
To apply:
rm -rf c/src/exec/score/cpu/a29k/wrap
rm -rf c/src/exec/score/cpu/hppa1.1/wrap
rm -rf c/src/exec/score/cpu/i386/wrap
rm -rf c/src/exec/score/cpu/mips64orion/wrap
rm -rf c/src/exec/score/cpu/no_cpu/wrap
patch -p1 < rtems-rc-19991123-rc-2.diff.gz
Notes:
* I don't see a possiblity to convert the powerpc subdirectory in its
current layout to automake the time being.
* Besides the fact that this subdirectory is not in single-tree building
layout, the actual showstopper is the ifeq $(RTEMS_CPU_MODEL),mpc750)
gmake-conditional in powerpc/Makefile.in, which automake (correctly)
refuses to handle.
* The problem is *not* specific to the powerpc. Other CPUs basically
have similar problems (SH:sh7032 vs sh7045, SPARC: erc32.h in
score/cpu/sparc), but have been lucky to get around real issues (cf.
configuration files below score/cpu/sh/).
* From a configuration focused POV this problem boils down to a
file/subdirectory selection problem:
ppc: 1 or others
sh: 1 out of 2
sparc: 1 out of 1
Automake's means to implement such behavior is using conditionals to be
evaluated at configuration-time. The old configuration scheme however
used make-time conditionals. The SH port was lucky to get around this
issue because it applies a selection from a limited set of possible
selections, the powerpc however applies a selection from an unlimited
set, based on data not being available at configuration time.
* Currently I only see two general solutions:
1) make RTEMS_CPU_MODEL available at configuration time, ie. replace
make-time configuration by configuration-time configuration
2) Perform the selection at build-time, i.e. always install all files,
but use #ifdef #else #endif in source files. This is what the m68k has
exploited at other locations inside of the source-tree.
=> This directory is the last one remaining not using automake below the
whole exec/ hierarchy.
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unnecessarily uses any variables defined by the BSP. On this
sweep, use of BSP_Configuration and Cpu_table was eliminated.
A significant part of this modification was the addition of
macros to access fields in the RTEMS configuration structures.
This is necessary to strengthen the division between the BSP independent
parts of RTEMS and the BSPs themselves. This started after
comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
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particular, using bsp.h, or getting information from the BSP which
should properly be obtained from RTEMS is forbidden. This is
necessary to strengthen the division between the BSP independent
parts of RTEMS and the BSPs themselves. This started after
comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
The changes primarily eliminated the need to include bsp.h and
peeking at BSP_Configuration. The use of Cpu_table in each
BSP needs to be eliminated.
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to correct a typo CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES was actually
typed in as CPU_CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES.
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I found a small buglet in the mips64orion _CPU_ISR_Set_level; the
original was wiping out the level argument, and then comparing the
current interrupt level with some random value of v0. See patch below.
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> 4) rtems-rc-19990202-0.diff /reorg-score-cpu.sh
>
> reorg-score-cpu.sh reorganizes the cpu/<cpu>/* subdirectories in a
> similar manner than previous reorg scripts did. rtems-rc-19990202-0.diff
> contains the diffs after reorg-score-cpu.sh has been run on a
> rtems-19981215 snapshot + my patches up to rtems-rc-19990131-2.diff.
>
> This patch is rather nasty and may break something. However, I've tested
> it for about 10 different target/bsp pairs and believe to have shaken
> out most bugs.
I wonder about the following .h files that were not moved:
a29k/asm.h
a29k/cpu_asm.h
i386/asm.h
i960/asm.h
m68k/asm.h
m68k/m68302.h
m68k/m68360.h
m68k/qsm.h
m68k/sim.h
mips64orion/asm.h
mips64orion/cpu_asm.h
mips64orion/mips64orion.h
no_cpu/asm.h
no_cpu/cpu_asm.h
powerpc/asm.h
powerpc/mpc860.h
sh/asm.h
sparc/asm.h
sparc/erc32.h
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> 4) rtems-rc-19990202-0.diff /reorg-score-cpu.sh
>
> reorg-score-cpu.sh reorganizes the cpu/<cpu>/* subdirectories in a
> similar manner than previous reorg scripts did. rtems-rc-19990202-0.diff
> contains the diffs after reorg-score-cpu.sh has been run on a
> rtems-19981215 snapshot + my patches up to rtems-rc-19990131-2.diff.
>
> This patch is rather nasty and may break something. However, I've tested
> it for about 10 different target/bsp pairs and believe to have shaken
> out most bugs.
I wonder about the following .h files that were not moved:
a29k/asm.h
a29k/cpu_asm.h
i386/asm.h
i960/asm.h
m68k/asm.h
m68k/m68302.h
m68k/m68360.h
m68k/qsm.h
m68k/sim.h
mips64orion/asm.h
mips64orion/cpu_asm.h
mips64orion/mips64orion.h
no_cpu/asm.h
no_cpu/cpu_asm.h
powerpc/asm.h
powerpc/mpc860.h
sh/asm.h
sparc/asm.h
sparc/erc32.h
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of switching to the modified GNU GPL.
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cpu.h: added prototype for _CPU_ISR_Get_level()
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Derrick Ostertag (ostertag@transition.com).
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