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* score: Add CPU_INTERRUPT_STACK_ALIGNMENTSebastian Huber2018-06-271-0/+2
| | | | | | | Add CPU port define for the interrupt stack alignment. The alignment should take the stack ABI and the cache line size into account. Update #3459.
* Remove unused CPU_MODES_INTERRUPT_LEVELSebastian Huber2018-06-271-1/+0
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* Add _CPU_Counter_frequency()Sebastian Huber2018-06-152-0/+3
| | | | | | | | | | Add rtems_counter_frequency() API function. Use it to initialize the counter value converter via the new system initialization step (RTEMS_SYSINIT_CPU_COUNTER). This decouples the counter implementation and the counter converter. It avoids an unnecessary pull in of the 64-bit integer division from libgcc. Update #3456.
* Remove register keyword from public header filesSebastian Huber2018-04-162-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following code void f(void) { register int i; } gives a warning with GCC and -std=c++17 test.cc: In function ‘void f()’: test.cc:3:15: warning: ISO C++1z does not allow ‘register’ storage class specifier [-Wregister] register int i; ^ and clang with -std=c++14 test.cc:3:3: warning: 'register' storage class specifier is deprecated and incompatible with C++1z [-Wdeprecated-register] register int i; ^~~~~~~~~ 1 warning generated. Remove the use of the register keyword at least in the public header files for C++ compatibility. Close #3397.
* m68k/include/rtems/score/types.h: Eliminate this fileJoel Sherrill2018-03-123-45/+3
| | | | Updates #3327.
* Remove make preinstallChris Johns2018-01-2514-87/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
* score: Delete _CPU_Context_Fp_start()Sebastian Huber2017-01-261-18/+7
| | | | | | | | | | Since the FP area pointer is passed by reference in _CPU_Context_Initialize_fp() the optional FP area adjustment via _CPU_Context_Fp_start() is superfluous. It is also wrong with respect to memory management, e.g. pointer passed to _Workspace_Free() may be not the one returned by _Workspace_Allocate(). Close #1400.
* Remove CPU_BIG_ENDIAN and CPU_LITTLE_ENDIANSebastian Huber2017-01-241-8/+0
| | | | | | Use de-facto standard BYTE_ORDER instead. Close #2803.
* score: Robust thread dispatchSebastian Huber2016-11-231-0/+1
| | | | | | | | | | | | On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811.
* score: Add _ISR_Is_enabled()Sebastian Huber2016-11-181-0/+5
| | | | | | | In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates a level parameter and returns a boolean value. Update #2811.
* rtems: Conditionally define rtems_interrupt_frameSebastian Huber2016-11-181-1/+1
| | | | Update #2808.
* score: Move CPU_PER_CPU_CONTROL_SIZESebastian Huber2016-11-182-2/+4
| | | | | Move CPU_PER_CPU_CONTROL_SIZE and the optional CPU_Per_CPU_control to <rtems/score/cpuimpl.h> to hide it from <rtems.h>.
* score: Remove obsolete definesSebastian Huber2016-11-181-2/+0
| | | | The thread dispatch inline option is no longer used.
* score: Add <rtems/score/cpuimpl.h>Sebastian Huber2016-11-073-0/+35
| | | | | | The aim of this file is to encapsulate CPU port implementation details. This helps to hide implementation details from <rtems.h> which indirectly includes <rtems/score/cpu.h>.
* score: Fix C/C++ compatibility issueSebastian Huber2016-09-231-4/+0
| | | | | | | Only use CPU_Per_CPU_control if it contains at least one filed. In GNU C empty structures have a size of zero. In C++ structures have a non-zero size. In case CPU_PER_CPU_CONTROL_SIZE is defined to zero, then this structure is not used anymore.
* score: Simplify priority bit map implementationSebastian Huber2016-06-081-2/+0
| | | | | | | | | | The priority bit map can deal with a maximum of 256 priority values ranging from 0 to 255. Consistently use an unsigned int for computation, due to the usual integer promotion rules. Make Priority_bit_map_Word definition architecture-independent and define it to uint16_t. This was already the case for all architectures except PowerPC. Adjust the PowerPC bitmap support accordingly.
* score: Delete CPU_USE_GENERIC_BITFIELD_DATASebastian Huber2016-06-081-1/+0
| | | | | | Rename __log2table into _Bitfield_Leading_zeros since it acually returns the count of leading zeros of an 8-bit integer. The value for zero is a bit odd. Provide it unconditionally.
* score: Add CPU_MAXIMUM_PROCESSORSSebastian Huber2016-03-041-0/+2
| | | | Maximum number of processors of all systems supported by this CPU port.
* m68k: Avoid SCORE_EXTERNSebastian Huber2016-02-172-28/+34
| | | | Update #2559.
* score: Introduce CPU_CACHE_LINE_BYTESSebastian Huber2016-01-261-1/+5
| | | | | Add CPU_CACHE_LINE_BYTES for the maximum cache line size in bytes. The actual processor may use no cache or a smaller cache line size.
* score: Delete obsolete CPU_TIMESTAMP_* definesSebastian Huber2016-01-251-2/+0
| | | | Update #2271.
* basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber2015-10-261-1/+1
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* m68k: Include proper header fileSebastian Huber2015-07-241-3/+3
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* score: Simplify <rtems/system.h>Sebastian Huber2015-06-261-1/+1
| | | | | Drop the <rtems/score/percpu.h> include since this file exposes a lot of implementation details.
* cpukit: add and use CPU_Uint32ptr typeGedare Bloom2015-03-161-0/+3
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* cpukit: Remove old DESCRIPTION: in commentsJoel Sherrill2015-03-111-6/+4
| | | | These were remnants of pre-Doxygen comment style.
* score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber2015-03-051-1/+0
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* m68k/rtems/score/cpu.h: _CPU_Context_Restart_self needed ↵Joel Sherrill2014-10-091-1/+1
| | | | RTEMS_COMPILER_NO_RETURN_ATTRIBUTE
* m68k: Use CPU_TIMESTAMP_USE_STRUCT_TIMESPECSebastian Huber2014-09-231-1/+1
| | | | | | | Converting 64-bit nanoseconds values into the common struct timeval or struct timespec formats requires a 64-bit division to get the seconds value. Performance analysis of high network loads revealed that this is too costly on PowerPC.
* Let CPU/BSP Fatal handler have access to sourceDaniel Hellstrom2014-09-101-2/+2
| | | | | | | | | Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
* score: Statically initialize _ISR_Vector_tableSebastian Huber2014-04-291-7/+2
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* score: Clarify TLS supportSebastian Huber2014-04-171-1/+1
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* score: Rename Priority_bit_map_ControlSebastian Huber2014-04-031-1/+1
| | | | Rename Priority_bit_map_Control in Priority_bit_map_Word.
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-218-8/+8
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* score: Add CPU counter supportSebastian Huber2014-02-142-0/+13
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* Add thread-local storage (TLS) supportSebastian Huber2014-02-044-24/+73
| | | | | Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
* score: Simplify <rtems/score/cpuatomic.h>WeiY2013-08-281-30/+6
| | | | Add proper license and copyright.
* score: Per-CPU thread dispatch disable levelSebastian Huber2013-08-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a per-CPU thread dispatch disable level. So instead of one global thread dispatch disable level we have now one instance per processor. This is a major performance improvement for SMP. On non-SMP configurations this may simplifiy the interrupt entry/exit code. The giant lock is still present, but it is now decoupled from the thread dispatching in _Thread_Dispatch(), _Thread_Handler(), _Thread_Restart_self() and the interrupt entry/exit. Access to the giant lock is now available via _Giant_Acquire() and _Giant_Release(). The giant lock is still implicitly acquired via _Thread_Dispatch_decrement_disable_level(). The giant lock is only acquired for high-level operations in interrupt handlers (e.g. release of a semaphore, sending of an event). As a side-effect this change fixes the lost thread dispatch necessary indication bug in _Thread_Dispatch(). A per-CPU thread dispatch disable level greatly simplifies the SMP support for the interrupt entry/exit code since no spin locks have to be acquired in this area. It is only necessary to get the current processor index and use this to calculate the address of the own per-CPU control. This reduces the interrupt latency considerably. All elements for the interrupt entry/exit code are now part of the Per_CPU_Control structure: thread dispatch disable level, ISR nest level and thread dispatch necessary. Nothing else is required (except CPU port specific stuff like on SPARC).
* score/cpu: Add CPU_Per_CPU_controlSebastian Huber2013-08-091-0/+6
| | | | Add CPU port specific per-CPU control.
* update-all-architectures-to-new-atomic-implementationWeiY2013-07-171-6/+4
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* score: Add CPU context validationSebastian Huber2013-05-101-0/+12
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* Revert bootstrap whitespace changes.Chris Johns2013-05-101-0/+1
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* Using the generic atomic ops to implement UP mode atomic for all ↵WeiY2013-05-013-0/+44
| | | | architectures. SMP atomic port will be later.
* m68k/cpu.h: Fix formatting and add comment blockJoel Sherrill2013-03-181-3/+10
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* RTEMS: Delete ChangeLog files.Gedare Bloom2013-03-081-655/+0
| | | | | | | | | This commit deletes all RTEMS ChangeLog files. These files have been abandoned since converting to git version control. The historical data may be recovered by checking out any commit before this one. Most of the contents of these ChangeLog files can also be found in the git log. Two external ChangeLog files, ChangeLog.slac and ChangeLog.zlib, remain.
* score: Doxygen Clean Up Task #15Alex Ivanov2013-01-088-39/+59
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* score misc: Clean up Doxygen GCI Task #12Alex Ivanov2012-12-071-29/+6
| | | | http://www.google-melange.com/gci/task/view/google/gci2012/7983217
* score: Add CPU_Exception_frameSebastian Huber2012-11-273-0/+27
| | | | | | | | | | | | | | | | | | | | | Add CPU port type CPU_Exception_frame and function _CPU_Exception_frame_print(). The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh, sparc64, and v850 use an empty default implementation of _CPU_Exception_frame_print(). Add rtems_exception_frame and rtems_exception_frame_print(). Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal() with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc, and sparc for unexpected exceptions. Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the BSP_PRINT_EXCEPTION_CONTEXT define used in the default bsp_fatal_extension(). Add test sptests/spfatal26.
* score: PR1607: Add and use CPU_SIZEOF_POINTERSebastian Huber2012-11-221-0/+2
| | | | | | | | | | | | | | | | | Add and use new CPU port define CPU_SIZEOF_POINTER. It must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code. The size of a pointer is part of the application binary interface (ABI) and thus independent of the actual programming language. The compiler will provide defines to determine the current ABI. We use these defines to select the appropriate CPU_SIZEOF_POINTER value. Static assertions in the new file "cpukit/score/src/percpuasm.c" will ensure that the value of CPU_SIZEOF_POINTER is consistent with the current compiler settings. Also the offset values used by assembler code are verfied.
* Remove CVS Id Strings (manual edits after script)Joel Sherrill2012-05-111-2/+0
| | | | | | These modifications were required by hand after running the script. In some cases, the file names did not match patterns. In others, the format of the file did not match any common patterns.
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