| Commit message (Collapse) | Author | Age | Files | Lines |
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Rename Priority_bit_map_Control in Priority_bit_map_Word.
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Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.
Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
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Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
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Add proper license and copyright.
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Use a per-CPU thread dispatch disable level. So instead of one global
thread dispatch disable level we have now one instance per processor.
This is a major performance improvement for SMP. On non-SMP
configurations this may simplifiy the interrupt entry/exit code.
The giant lock is still present, but it is now decoupled from the thread
dispatching in _Thread_Dispatch(), _Thread_Handler(),
_Thread_Restart_self() and the interrupt entry/exit. Access to the
giant lock is now available via _Giant_Acquire() and _Giant_Release().
The giant lock is still implicitly acquired via
_Thread_Dispatch_decrement_disable_level().
The giant lock is only acquired for high-level operations in interrupt
handlers (e.g. release of a semaphore, sending of an event).
As a side-effect this change fixes the lost thread dispatch necessary
indication bug in _Thread_Dispatch().
A per-CPU thread dispatch disable level greatly simplifies the SMP
support for the interrupt entry/exit code since no spin locks have to be
acquired in this area. It is only necessary to get the current
processor index and use this to calculate the address of the own per-CPU
control. This reduces the interrupt latency considerably.
All elements for the interrupt entry/exit code are now part of the
Per_CPU_Control structure: thread dispatch disable level, ISR nest level
and thread dispatch necessary. Nothing else is required (except CPU
port specific stuff like on SPARC).
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Add CPU port specific per-CPU control.
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architectures. SMP atomic port will be later.
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This commit deletes all RTEMS ChangeLog files. These files have been abandoned
since converting to git version control. The historical data may be recovered
by checking out any commit before this one. Most of the contents of these
ChangeLog files can also be found in the git log.
Two external ChangeLog files, ChangeLog.slac and ChangeLog.zlib, remain.
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http://www.google-melange.com/gci/task/view/google/gci2012/7983217
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Add CPU port type CPU_Exception_frame and function
_CPU_Exception_frame_print().
The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh,
sparc64, and v850 use an empty default implementation of
_CPU_Exception_frame_print().
Add rtems_exception_frame and rtems_exception_frame_print().
Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal()
with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc,
and sparc for unexpected exceptions.
Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the
BSP_PRINT_EXCEPTION_CONTEXT define used in the default
bsp_fatal_extension().
Add test sptests/spfatal26.
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Add and use new CPU port define CPU_SIZEOF_POINTER. It must be an
integer literal that can be used by the assembler. This value will be
used to calculate offsets of structure members. These offsets will be
used in assembler code.
The size of a pointer is part of the application binary interface (ABI)
and thus independent of the actual programming language. The compiler
will provide defines to determine the current ABI. We use these defines
to select the appropriate CPU_SIZEOF_POINTER value.
Static assertions in the new file "cpukit/score/src/percpuasm.c" will
ensure that the value of CPU_SIZEOF_POINTER is consistent with the
current compiler settings. Also the offset values used by assembler
code are verfied.
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These modifications were required by hand after running the script.
In some cases, the file names did not match patterns. In others,
the format of the file did not match any common patterns.
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html
for details.
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PR 1914/cpukit
* rtems/score/cpu.h: Select timestamp implementation.
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* cpu.c, cpu_asm.S: Remove /*PAGE markers which were interpreted by a
long dead print script.
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* libfs/src/dosfs/fat_file.c, libmisc/monitor/monitor.h,
score/cpu/m68k/rtems/score/cpu.h: Remove stray spaces from unsigned32
to uint32_t conversion.
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* Makefile.am: Reformat.
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* cpu.c, rtems/score/cpu.h, rtems/score/m68k.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
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PR 1635/cpukit
* rtems/score/types.h: Refactoring of priority handling, to isolate the
bitmap implementation of priorities in the supercore so that priority
management is a little more modular. This change is in anticipation
of scheduler implementations that can select how they manage tracking
priority levels / finding the highest priority ready task. Note that
most of the changes here are simple renaming, to clarify the use of
the bitmap-based priority management.
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* rtems/score/cpu.h: Include <rtems/score/types.h> first.
* rtems/score/types.h: Use <rtems/score/basedefs.h> header file.
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PR 1573/cpukit
* cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
contains the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
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* cpu_asm.S, rtems/score/cpu.h: On uC5282, the thread restart needed to
reload the frame pointer. As part of doing this, the code was moved
from inline asm to the .S file.
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* cpu.c, cpu_asm.S: Add include of config.h
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* rtems/score/cpu.h: Define CPU_STRUCTURE_ALIGNMENT to be on a 4 byte
boundary.
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initialization, save and restore code.
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PR 1385/cpukit
* cpu_asm.S: When the type rtems_boolean was switched to the C99 bool,
the size changed from 4 bytes to 1 byte. The interrupt dispatching
code accesses two boolean variables for scheduling purposes and the
assembly implementations of this code did not get updated.
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* rtems/score/cpu.h: Change prototype of IDLE thread to consistently
return void * and take a uintptr_t argument.
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* cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and
passing address of _Thread_Dispatch to _CPU_Initialize. Clean up
comments.
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* rtems/score/m68k.h: Don't include rtems/score/types.h,
rtems/stdint.h.
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* rtems/score/m68k.h: Move set cacr, acr0, acr1 routines here to get
them out of a BSP.
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* rtems/score/types.h: Do not define boolean, single_precision,
double_precision unless RTEMS_DEPRECATED_TYPES is given.
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* cpu.c, rtems/score/cpu.h: Remove extraneous spaces.
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* rtems/score/types.h: Include stdbool.h.
Use bool as base-type for boolean.
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* rtems/score/cpu.h: Fix type when initializing FP context.
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