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* score: Add CPU_INTERRUPT_STACK_ALIGNMENTSebastian Huber2018-06-271-0/+2
| | | | | | | Add CPU port define for the interrupt stack alignment. The alignment should take the stack ABI and the cache line size into account. Update #3459.
* Remove unused CPU_MODES_INTERRUPT_LEVELSebastian Huber2018-06-271-1/+0
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* Add _CPU_Counter_frequency()Sebastian Huber2018-06-152-0/+3
| | | | | | | | | | Add rtems_counter_frequency() API function. Use it to initialize the counter value converter via the new system initialization step (RTEMS_SYSINIT_CPU_COUNTER). This decouples the counter implementation and the counter converter. It avoids an unnecessary pull in of the 64-bit integer division from libgcc. Update #3456.
* Remove register keyword from public header filesSebastian Huber2018-04-163-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following code void f(void) { register int i; } gives a warning with GCC and -std=c++17 test.cc: In function ‘void f()’: test.cc:3:15: warning: ISO C++1z does not allow ‘register’ storage class specifier [-Wregister] register int i; ^ and clang with -std=c++14 test.cc:3:3: warning: 'register' storage class specifier is deprecated and incompatible with C++1z [-Wdeprecated-register] register int i; ^~~~~~~~~ 1 warning generated. Remove the use of the register keyword at least in the public header files for C++ compatibility. Close #3397.
* i386/smp: Export _CPU_SMP_Prepare_start_multitasking as a functionAmaan Cheval2018-03-161-2/+1
| | | | | | | | | | When it's a macro, a function declaration causes a compiler error due to the macro being expanded. Partial log showing error: https://gist.github.com/AmaanC/ab3521141479aa6f61ea25f5d74ebb4d Closes #3331
* i386/smp: Define CPU_Interrupt_frame as non-void structAmaan Cheval2018-03-161-1/+15
| | | | | | | | | | | | This change, excluding the #error directive, lets us make progress towards compiling i386 targets with --enable-smp. The #error directive needs to be there since the CPU_Interrupt_frame is used by the SMP context switching code, and this placeholder struct, if used, would only lead to more subtle bugs and errors. With the directive, the SMP context switching code can be improved separately. Updates #3331
* Rework i386 Paravirtualization to have paravirt.hJoel Sherrill2018-03-135-3/+70
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* i386/include/rtems/score/types.h: Eliminate this fileJoel Sherrill2018-03-124-49/+4
| | | | Updates #3327.
* Remove make preinstallChris Johns2018-01-2513-75/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
* i386: Support thread-local storage (TLS)Sebastian Huber2017-06-123-7/+43
| | | | Update #2468.
* i386: Move _CPU_Context_Initialize()Sebastian Huber2017-06-092-46/+65
| | | | Update #2468.
* cpukit/../i386/cpu.c: Use inttypes.h to fix 1 warning.Cillian O'Donnell2017-04-141-1/+2
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* score: Delete _CPU_Context_Fp_start()Sebastian Huber2017-01-261-3/+0
| | | | | | | | | | Since the FP area pointer is passed by reference in _CPU_Context_Initialize_fp() the optional FP area adjustment via _CPU_Context_Fp_start() is superfluous. It is also wrong with respect to memory management, e.g. pointer passed to _Workspace_Free() may be not the one returned by _Workspace_Allocate(). Close #1400.
* Remove CPU_BIG_ENDIAN and CPU_LITTLE_ENDIANSebastian Huber2017-01-241-8/+0
| | | | | | Use de-facto standard BYTE_ORDER instead. Close #2803.
* score: Robust thread dispatchSebastian Huber2016-11-231-0/+2
| | | | | | | | | | | | On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811.
* score: Add _ISR_Is_enabled()Sebastian Huber2016-11-181-0/+5
| | | | | | | In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates a level parameter and returns a boolean value. Update #2811.
* rtems: Conditionally define rtems_interrupt_frameSebastian Huber2016-11-181-1/+1
| | | | Update #2808.
* score: Move CPU_PER_CPU_CONTROL_SIZESebastian Huber2016-11-182-2/+4
| | | | | Move CPU_PER_CPU_CONTROL_SIZE and the optional CPU_Per_CPU_control to <rtems/score/cpuimpl.h> to hide it from <rtems.h>.
* score: Remove obsolete definesSebastian Huber2016-11-181-2/+0
| | | | The thread dispatch inline option is no longer used.
* score: Add <rtems/score/cpuimpl.h>Sebastian Huber2016-11-073-0/+35
| | | | | | The aim of this file is to encapsulate CPU port implementation details. This helps to hide implementation details from <rtems.h> which indirectly includes <rtems/score/cpu.h>.
* score: Fix C/C++ compatibility issueSebastian Huber2016-09-231-4/+0
| | | | | | | Only use CPU_Per_CPU_control if it contains at least one filed. In GNU C empty structures have a size of zero. In C++ structures have a non-zero size. In case CPU_PER_CPU_CONTROL_SIZE is defined to zero, then this structure is not used anymore.
* i386: Fix _CPU_Bitfield_Find_first_bit()Sebastian Huber2016-06-131-6/+5
| | | | Bug introduced by b04b76c6a0c87ffc9670d356e793108411ce355a.
* score: Simplify priority bit map implementationSebastian Huber2016-06-081-1/+0
| | | | | | | | | | The priority bit map can deal with a maximum of 256 priority values ranging from 0 to 255. Consistently use an unsigned int for computation, due to the usual integer promotion rules. Make Priority_bit_map_Word definition architecture-independent and define it to uint16_t. This was already the case for all architectures except PowerPC. Adjust the PowerPC bitmap support accordingly.
* score: Delete CPU_USE_GENERIC_BITFIELD_DATASebastian Huber2016-06-081-1/+0
| | | | | | Rename __log2table into _Bitfield_Leading_zeros since it acually returns the count of leading zeros of an 8-bit integer. The value for zero is a bit odd. Provide it unconditionally.
* score/i386: Fix printk format warnings.Chris Johns2016-05-251-5/+7
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* i386: Define _CPU_SMP_Prepare_start_multitasking()Sebastian Huber2016-03-041-1/+2
| | | | | Define _CPU_SMP_Prepare_start_multitasking() as empty macro to prevent a link-time error on SMP configurations.
* score: Add CPU_MAXIMUM_PROCESSORSSebastian Huber2016-03-041-0/+2
| | | | Maximum number of processors of all systems supported by this CPU port.
* i386: refactor libcpu/cpu.h into rtems/score/i386.hJoel Sherrill2016-03-032-19/+423
| | | | Fixes #2515.
* i386 ..score/cpu.h: Fix spacingJoel Sherrill2016-03-031-2/+2
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* i386: prepare for paravirtualized interruptsGedare Bloom2016-03-033-1/+19
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* i386: relocate fatal halt to bsp layerGedare Bloom2016-03-031-9/+2
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* i386: remove redundant CPP definesGedare Bloom2016-03-031-3/+0
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* i386: move idle thread into BSP layerGedare Bloom2016-03-032-9/+1
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* i386: Avoid SCORE_EXTERNSebastian Huber2016-02-172-1/+5
| | | | Update #2559.
* score: Introduce CPU_CACHE_LINE_BYTESSebastian Huber2016-01-261-0/+4
| | | | | Add CPU_CACHE_LINE_BYTES for the maximum cache line size in bytes. The actual processor may use no cache or a smaller cache line size.
* score: Delete obsolete CPU_TIMESTAMP_* definesSebastian Huber2016-01-251-2/+0
| | | | Update #2271.
* basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber2015-10-261-1/+1
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* score: Simplify <rtems/system.h>Sebastian Huber2015-06-261-0/+1
| | | | | Drop the <rtems/score/percpu.h> include since this file exposes a lot of implementation details.
* cpukit: add and use CPU_Uint32ptr typeGedare Bloom2015-03-161-0/+3
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* score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber2015-03-051-1/+0
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* score: Add _CPU_SMP_Prepare_start_multitasking()Sebastian Huber2015-02-171-0/+2
| | | | Update #2268.
* i386: doxygen and comments related to VESA real mode framebufferJan Dolezal2014-12-042-17/+26
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* score: i386: functions converting real mode pointer to physical address and backJan Dolezal2014-11-202-0/+75
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* score/cpu/i386/rtems/score/cpu.h: Fix set but not used warningJoel Sherrill2014-10-201-0/+1
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* Let CPU/BSP Fatal handler have access to sourceDaniel Hellstrom2014-09-101-1/+1
| | | | | | | | | Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
* Regenerate all preinstall.am files.Chris Johns2014-08-291-3/+3
| | | | | With this patch the preinstall.am files are in a set order and not dependent on now perl implements a hash.
* Regenerate all preinstall.am files.Joel Sherrill2014-08-281-3/+3
| | | | | Apparently, at some point automake output changed and these were not updated.
* score: Fix CPU context usage on SMPSebastian Huber2014-05-082-13/+18
| | | | | | | | | | We must not alter the is executing indicator in _CPU_Context_Initialize() since this would cause an invalid state during a self restart. The is executing indicator must be valid at creation time since otherwise _Thread_Kill_zombies() uses an undefined value for not started threads. This could result in a system life lock.
* score: Implement forced thread migrationSebastian Huber2014-05-073-7/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of task migration in RTEMS has some implications with respect to the interrupt latency. It is crucial to preserve the system invariant that a task can execute on at most one processor in the system at a time. This is accomplished with a boolean indicator in the task context. The processor architecture specific low-level task context switch code will mark that a task context is no longer executing and waits that the heir context stopped execution before it restores the heir context and resumes execution of the heir task. So there is one point in time in which a processor is without a task. This is essential to avoid cyclic dependencies in case multiple tasks migrate at once. Otherwise some supervising entity is necessary to prevent life-locks. Such a global supervisor would lead to scalability problems so this approach is not used. Currently the thread dispatch is performed with interrupts disabled. So in case the heir task is currently executing on another processor then this prolongs the time of disabled interrupts since one processor has to wait for another processor to make progress. It is difficult to avoid this issue with the interrupt latency since interrupts normally store the context of the interrupted task on its stack. In case a task is marked as not executing we must not use its task stack to store such an interrupt context. We cannot use the heir stack before it stopped execution on another processor. So if we enable interrupts during this transition we have to provide an alternative task independent stack for this time frame. This issue needs further investigation.
* score: Statically initialize _ISR_Vector_tableSebastian Huber2014-04-291-7/+0
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