summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/h8300/rtems/score (follow)
Commit message (Collapse)AuthorAgeFilesLines
* 2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>Ralf Corsepius2004-03-301-23/+23
| | | | * cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
* Unused.Ralf Corsepius2004-03-081-2/+0
|
* 2003-09-26 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-261-7/+0
| | | | | * rtems/score/cpu.h: Obsoleting HP PA-RISC port and removing all references.
* 2003-09-04 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-043-3/+3
| | | | | * asm.h, cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/h8300.h, rtems/score/types.h: URL for license changed.
* 2003-08-14 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-08-141-1/+4
| | | | | PR 455/bsps * rtems/score/cpu.h: Added missing CPU_swap_u16().
* 2002-11-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2002-11-061-0/+6
| | | | | * rtems/score/cpu.h: Add prototype of H8BD_Install_IRQ to eliminate warning.
* 2002-07-05 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-07-051-1/+1
| | | | * rtems/score/cpu.h: Filled in something that was marked XXX.
* 2002-07-01 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-07-011-2/+2
| | | | | | * rtems/score/cpu.h: Fixed comments and renamed CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK to CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK to be consistent with other code.
* 2001-04-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-04-031-1/+1
| | | | | | | * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. * rtems/score/h8300types.h: Removed. * rtems/score/types.h: New file via CVS magic. * Makefile.am, rtems/score/cpu.h: Account for name change.
* 2002-01-07 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2002-01-081-0/+2
| | | | * rtems/score/cpu.h: #include <rtems/bspIo.h>.
* 2001-11-28 Joel Sherrill <joel@OARcorp.com>,Joel Sherrill2001-11-281-0/+7
| | | | | | | This was tracked as PR91. * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which is used to specify if the port uses the standard macro for this (FALSE). A TRUE setting indicates the port provides its own implementation.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-031-1/+9
| | | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-181-15/+12
| | | | | | | * cpu_asm.S, rtems/score/cpu.h: Modified to better support multilibing. These changes result in the code being able to compile with the default gcc settings. It is not functional in this configuration but does compile.
* Update from Philip Quaife <rtemsdev@qs.co.nz> that was hand-merged.Joel Sherrill2000-07-171-1/+51
| | | | | | | | | | This update addresses the following: + the ISR enable/disable/flash macros now work with old gcc versions. + the UI CCR bits are now masked since other example code did so + _ISR_Dispatch disables interrupts during call setup Together these removed the instabilities he was seeing.
* Interrupt stack is allocated in _ISR_Handler_initialization notJoel Sherrill2000-07-031-1/+1
| | | | _Interrupt_Manager_initialization.
* Changed extra_system_initialization_stack to extra_mpci_receive_server_stackJoel Sherrill2000-07-031-1/+1
| | | | to be consistent with other ports.
* This is the initial addition of the port of RTEMS to theJoel Sherrill2000-06-294-0/+1238
Hitachi H8 family. This port was done by Philip Quaife <philip@qs.co.nz> of Q Solutions and sponsored by Comnet Technologies Ltd. The port was done based on RTEMS 3.5.1 to a Hitach H8300H. The port was updated to RTEMS 4.5 style Makefiles/configure by Joel Sherrill <joel@OARcorp.com>. While doing this Joel added support for the h8300-rtems to binutils, gcc, newlib, and gdb. NOTE: Philip submitted a BSP for a Hitachi evaluation board which is being merged as a separate entity.
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-05 06:14:06 +0000