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* rtems/score/cpu.h: Filled in something that was marked XXX.
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* rtems/score/cpu.h: Fixed comments and renamed
CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK to
CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK to be consistent with other code.
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* Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
* rtems/score/h8300types.h: Removed.
* rtems/score/types.h: New file via CVS magic.
* Makefile.am, rtems/score/cpu.h: Account for name change.
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* rtems/score/cpu.h: #include <rtems/bspIo.h>.
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This was tracked as PR91.
* rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
is used to specify if the port uses the standard macro for this (FALSE).
A TRUE setting indicates the port provides its own implementation.
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* cpu_asm.S: Modify to properly dereference _ISR_Vector_table
now that it is dynamically allocated.
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* cpu_asm.S, rtems/score/cpu.h: Modified to better support
multilibing. These changes result in the code being able to
compile with the default gcc settings. It is not functional
in this configuration but does compile.
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This update addresses the following:
+ the ISR enable/disable/flash macros now work with old gcc versions.
+ the UI CCR bits are now masked since other example code did so
+ _ISR_Dispatch disables interrupts during call setup
Together these removed the instabilities he was seeing.
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_Interrupt_Manager_initialization.
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to be consistent with other ports.
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Hitachi H8 family. This port was done by Philip Quaife
<philip@qs.co.nz> of Q Solutions and sponsored by
Comnet Technologies Ltd. The port was done based on RTEMS 3.5.1
to a Hitach H8300H. The port was updated to RTEMS 4.5 style
Makefiles/configure by Joel Sherrill <joel@OARcorp.com>.
While doing this Joel added support for the h8300-rtems to
binutils, gcc, newlib, and gdb.
NOTE: Philip submitted a BSP for a Hitachi evaluation board
which is being merged as a separate entity.
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unnecessarily uses any variables defined by the BSP. On this
sweep, use of BSP_Configuration and Cpu_table was eliminated.
A significant part of this modification was the addition of
macros to access fields in the RTEMS configuration structures.
This is necessary to strengthen the division between the BSP independent
parts of RTEMS and the BSPs themselves. This started after
comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
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particular, using bsp.h, or getting information from the BSP which
should properly be obtained from RTEMS is forbidden. This is
necessary to strengthen the division between the BSP independent
parts of RTEMS and the BSPs themselves. This started after
comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
The changes primarily eliminated the need to include bsp.h and
peeking at BSP_Configuration. The use of Cpu_table in each
BSP needs to be eliminated.
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to correct a typo CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES was actually
typed in as CPU_CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES.
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> 4) rtems-rc-19990202-0.diff /reorg-score-cpu.sh
>
> reorg-score-cpu.sh reorganizes the cpu/<cpu>/* subdirectories in a
> similar manner than previous reorg scripts did. rtems-rc-19990202-0.diff
> contains the diffs after reorg-score-cpu.sh has been run on a
> rtems-19981215 snapshot + my patches up to rtems-rc-19990131-2.diff.
>
> This patch is rather nasty and may break something. However, I've tested
> it for about 10 different target/bsp pairs and believe to have shaken
> out most bugs.
I wonder about the following .h files that were not moved:
a29k/asm.h
a29k/cpu_asm.h
i386/asm.h
i960/asm.h
m68k/asm.h
m68k/m68302.h
m68k/m68360.h
m68k/qsm.h
m68k/sim.h
mips64orion/asm.h
mips64orion/cpu_asm.h
mips64orion/mips64orion.h
no_cpu/asm.h
no_cpu/cpu_asm.h
powerpc/asm.h
powerpc/mpc860.h
sh/asm.h
sparc/asm.h
sparc/erc32.h
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