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2001-01-032001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill1-0/+6
* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
2000-10-182000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill1-5/+8
* rtems/score/c4x.h: Modified to properly multilib. This required using only macros predefined by gcc.
2000-07-26Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2-0/+4
a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
2000-03-01Added routines to get and set C3x IOF register. The code is conditionallyJoel Sherrill1-13/+71
compiled and there is no comparable code for the C4x.
2000-02-29BSP now compiles and links with CAVSL board information. This includesJoel Sherrill1-3/+3
linkcmds updated, simio references removed, and switch to libchip for serial ports from simio. Added a MEMORY_MAP file to capture information about the various addresses on this board. In addition, many of the beta patches are now included.
2000-02-22New port of RTEMS to TI C3x and C4x.Joel Sherrill6-0/+1897