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* Fix typo in comment.Ralf Corsepius2004-11-021-2/+2
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* 2004-09-29 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2004-09-291-4/+1
| | | | * rtems/score/cpu.h: i960 obsoleted and all references removed.
* 2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>Ralf Corsepius2004-03-301-9/+9
| | | | | * c4xio.h, cpu.c, irq.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
* Unused.Ralf Corsepius2004-03-081-2/+0
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* 2003-09-26 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-261-7/+0
| | | | | * rtems/score/cpu.h: Obsoleting HP PA-RISC port and removing all references.
* 2003-09-04 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-044-4/+4
| | | | | * cpu.c, cpu_asm.S, irq.c, rtems/score/c4x.h, rtems/score/cpu.h, rtems/score/cpu_asm.h, rtems/score/types.h: URL for license changed.
* 2002-07-05 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-07-051-3/+2
| | | | | * cpu.c, irq.c, rtems/score/cpu.h: Filled in something that was marked XXX.
* 2001-04-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-04-031-1/+1
| | | | | | | * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. * rtems/score/c4xtypes.h: Removed. * rtems/score/types.h: New file via CVS magic. * Makefile.am, rtems/score/cpu.h: Account for name change.
* 2001-11-28 Joel Sherrill <joel@OARcorp.com>,Joel Sherrill2001-11-281-0/+7
| | | | | | | This was tracked as PR91. * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which is used to specify if the port uses the standard macro for this (FALSE). A TRUE setting indicates the port provides its own implementation.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-031-0/+6
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-181-5/+8
| | | | | * rtems/score/c4x.h: Modified to properly multilib. This required using only macros predefined by gcc.
* Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2000-07-261-0/+2
| | | | | | | | | | | a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
* BSP now compiles and links with CAVSL board information. This includesJoel Sherrill2000-02-291-3/+3
| | | | | | | | | | linkcmds updated, simio references removed, and switch to libchip for serial ports from simio. Added a MEMORY_MAP file to capture information about the various addresses on this board. In addition, many of the beta patches are now included.
* New port of RTEMS to TI C3x and C4x.Joel Sherrill2000-02-224-0/+1744
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