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Closes #2148
Fix suggested in above ticket. On examination, the assembly
appears to be clearing the DISPATCH_NEEDED flag before jumping
to _Thread_Dispatch.
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Use a per-CPU thread dispatch disable level. So instead of one global
thread dispatch disable level we have now one instance per processor.
This is a major performance improvement for SMP. On non-SMP
configurations this may simplifiy the interrupt entry/exit code.
The giant lock is still present, but it is now decoupled from the thread
dispatching in _Thread_Dispatch(), _Thread_Handler(),
_Thread_Restart_self() and the interrupt entry/exit. Access to the
giant lock is now available via _Giant_Acquire() and _Giant_Release().
The giant lock is still implicitly acquired via
_Thread_Dispatch_decrement_disable_level().
The giant lock is only acquired for high-level operations in interrupt
handlers (e.g. release of a semaphore, sending of an event).
As a side-effect this change fixes the lost thread dispatch necessary
indication bug in _Thread_Dispatch().
A per-CPU thread dispatch disable level greatly simplifies the SMP
support for the interrupt entry/exit code since no spin locks have to be
acquired in this area. It is only necessary to get the current
processor index and use this to calculate the address of the own per-CPU
control. This reduces the interrupt latency considerably.
All elements for the interrupt entry/exit code are now part of the
Per_CPU_Control structure: thread dispatch disable level, ISR nest level
and thread dispatch necessary. Nothing else is required (except CPU
port specific stuff like on SPARC).
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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PR 1573/cpukit
* cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
contains the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
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* cpu_asm.S: Use SYM macro to be consistent with other ports.
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* cpu_asm.S: L0-L3 were part of the interrupt context, but as
Mike Frysinger noted they were not being zeroed before calling
the C handlers. A patch that corrects this, as well as improving
some of the push/pop order to avoid stalls.
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* cpu.c, cpu_asm.S, rtems/score/cpu.h: Fine tune registers saved in the
context. The sp and imask registers need to be saved. Also allocated
12 bytes on the stack at thread entry as the abi requires that.
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* Makefile.am: Remove unused file.
* irq.c: Removed.
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PR 1385/cpukit
* cpu_asm.S: When the type rtems_boolean was switched to the C99 bool,
the size changed from 4 bytes to 1 byte. The interrupt dispatching
code accesses two boolean variables for scheduling purposes and the
assembly implementations of this code did not get updated.
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* rtems/include/rtems/rtems/ratemon.h,
rtems/include/rtems/rtems/status.h,
score/include/rtems/score/coremutex.h,
score/include/rtems/score/object.h: Removed extraneous commas.
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* cpu_asm.S: Fix two problems:
- CC bit has been clobbered and was not correctly restored
- bfin hardware does not allow to read instructions from the L1
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* cpu_asm.S: Re-add HI, LO.
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* Makefile.am, cpu.c, cpu_asm.S, preinstall.am, rtems/score/bfin.h:
Clean up rtems/score/bfin.h removing parts that are not needed by
RTEMS CPUkit to bfin specific .h files.
* rtems/bfin/bf533.h, rtems/bfin/bfin.h: New files.
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* .cvsignore, ChangeLog, Makefile.am, cpu.c, cpu_asm.S, irq.c,
preinstall.am, rtems/asm.h, rtems/score/bfin.h, rtems/score/cpu.h,
rtems/score/cpu_asm.h, rtems/score/types.h: New files.
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