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The stack pointer must be aligned on 8 byte boundary on ARM, so the size of
the exception frame must be a multiple of 8 bytes. Otherwise we might/will
get an alignment fault, when executing code in the data abort handler for
example.
Close #2318.
Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
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Update #2268.
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ARMv6-M is not supported since we cannot directly use the ARMv7-M code
due to some inline assembler statements.
Close #2231.
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Converting 64-bit nanoseconds values into the common struct timeval or
struct timespec formats requires a 64-bit division to get the seconds
value. Performance analysis of high network loads revealed that this is
too costly on ARM.
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RTEMS_COMPILER_NO_RETURN_ATTRIBUTE
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Without the source the error code does not say that much.
Let it be up to the CPU/BSP to determine the error code
reported on fatal shutdown.
This patch does not change the current behaviour, just
adds the option to handle the source of the fatal halt.
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This floating point unit is available in Cortex-M4 processors and
defined by ARMv7-M. This adds basic support for other VFP-D16 variants.
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We must not alter the is executing indicator in
_CPU_Context_Initialize() since this would cause an invalid state during
a self restart.
The is executing indicator must be valid at creation time since
otherwise _Thread_Kill_zombies() uses an undefined value for not started
threads. This could result in a system life lock.
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The current implementation of task migration in RTEMS has some
implications with respect to the interrupt latency. It is crucial to
preserve the system invariant that a task can execute on at most one
processor in the system at a time. This is accomplished with a boolean
indicator in the task context. The processor architecture specific
low-level task context switch code will mark that a task context is no
longer executing and waits that the heir context stopped execution
before it restores the heir context and resumes execution of the heir
task. So there is one point in time in which a processor is without a
task. This is essential to avoid cyclic dependencies in case multiple
tasks migrate at once. Otherwise some supervising entity is necessary to
prevent life-locks. Such a global supervisor would lead to scalability
problems so this approach is not used. Currently the thread dispatch is
performed with interrupts disabled. So in case the heir task is
currently executing on another processor then this prolongs the time of
disabled interrupts since one processor has to wait for another
processor to make progress.
It is difficult to avoid this issue with the interrupt latency since
interrupts normally store the context of the interrupted task on its
stack. In case a task is marked as not executing we must not use its
task stack to store such an interrupt context. We cannot use the heir
stack before it stopped execution on another processor. So if we enable
interrupts during this transition we have to provide an alternative task
independent stack for this time frame. This issue needs further
investigation.
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Add and use _CPU_SMP_Start_processor(). Add and use
_CPU_SMP_Finalize_initialization(). This makes most
_CPU_SMP_Initialize() functions a bit simpler since we can calculate the
minimum value of the count of processors requested by the application
configuration and the count of physically or virtually available
processors in the high-level code.
The CPU port has now the ability to signal a processor start failure.
With the support for clustered/partitioned scheduling the presence of
particular processors can be configured to be optional or mandatory.
There will be a fatal error only in case mandatory processors are not
present.
The CPU port may use a timeout to monitor the start of a processor.
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Remove RTEMS_COMPILER_PURE_ATTRIBUTE from _SMP_Get_current_processor()
and all _CPU_SMP_Get_current_processor(). Make inline ASM statements
volatile again. Test smptests/smpmigration01 showed that GCC optimizes
too much otherwise.
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Rename bsp_smp_initialize() into _CPU_SMP_Initialize() since every CPU
port must supply this function.
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Do not return to BSP context in the exit() shutdown path. This makes it
possible to re-use the initialization stack. It can be used for the
interrupt stack for example. On targets with a small RAM this is a
considerable benefit.
This change eliminates also some special cases and simplifies the code.
Delete _Thread_Set_global_exit_status(),
_Thread_Get_global_exit_status() and _Thread_Stop_multitasking().
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The instructions to get the processor current index have no
side-effects.
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Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.
Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
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Delete _CPU_Context_switch_to_first_task_smp() and use
_CPU_Context_restore() instead.
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Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
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Add CPU port specific per-CPU control.
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The set of interrupt levels must be a continuous range of non-negative
integers starting at zero.
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Rename to _CPU_SMP_Processor_event_receive().
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Rename to _CPU_SMP_Processor_event_broadcast().
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Delete bsp_smp_interrupt_cpu().
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Add and use _SMP_Get_current_processor() and
rtems_smp_get_current_processor().
Delete bsp_smp_interrupt_cpu().
Change type of current processor index from int to uint32_t to match
_SMP_Processor_count type.
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The Thumb-2 instruction set as encodings for the relevant instructions.
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This is the result of a sed script which converts all uses
of @{ into a consistent form.
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Provide proper CPU_Exception_frame definition for ARMv4 and use it.
Remove arm_cpu_context.
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Move bsp_interrupt_dispatch() and arm_exc_interrupt() prototypes to new
file <rtems/score/armv4.h> since they have nothing to do with the CPU
port.
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This patch is a task from GCI 2012 which improves the Doxygen
comments in the RTEMS source.
http://www.google-melange.com/gci/task/view/google/gci2012/8013205
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Add CPU port type CPU_Exception_frame and function
_CPU_Exception_frame_print().
The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh,
sparc64, and v850 use an empty default implementation of
_CPU_Exception_frame_print().
Add rtems_exception_frame and rtems_exception_frame_print().
Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal()
with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc,
and sparc for unexpected exceptions.
Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the
BSP_PRINT_EXCEPTION_CONTEXT define used in the default
bsp_fatal_extension().
Add test sptests/spfatal26.
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Add and use new CPU port define CPU_SIZEOF_POINTER. It must be an
integer literal that can be used by the assembler. This value will be
used to calculate offsets of structure members. These offsets will be
used in assembler code.
The size of a pointer is part of the application binary interface (ABI)
and thus independent of the actual programming language. The compiler
will provide defines to determine the current ABI. We use these defines
to select the appropriate CPU_SIZEOF_POINTER value.
Static assertions in the new file "cpukit/score/src/percpuasm.c" will
ensure that the value of CPU_SIZEOF_POINTER is consistent with the
current compiler settings. Also the offset values used by assembler
code are verfied.
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