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All other architectures use uint32_t for interrupt levels and there is
no reason not to do so on AArch64.
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Context validation for AArch64 was ported from the ARM implementation
without a reinterpretation of the actual requirements. The spcontext01
test just happened to pass because the set of scratch registers in ARM
is a subset of the scratch registers in AArch64.
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This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
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Cloning under Cygwin turned off executable permission on these
files. This shows them as modified even though they have not
explicitly been touched. Executable permission should not have
been on for these files so this is just a minor clean up.
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Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it
is a proper declaration of a function which does not return. Fix the type of
the error code. If necessary, add the implementation to cpu.c. Implementing
_CPU_Fatal_halt() as a function makes it possible to wrap this function for
example to fully test _Terminate().
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Remove _CPU_SMP_Processor_event_broadcast() and
_CPU_SMP_Processor_event_receive(). These functions are hard to use since they
are subject to the lost wake up problem.
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Currently, the AArch64 BSPs have a hard time running on real hardware
without building the toolchain and the bsps with -mstrict-align in
multiple places. Configuring the MMU on these chips allows for unaligned
memory accesses for non-device memory which avoids requiring strict
alignment in the toolchain and in the BSPs themselves.
In writing this driver, it was found that the synchronous exception
handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to
avoid thread stack misalignments in RTEMS_DEBUG mode. This is now
avoided by exactly preserving thread mode stack and flags and the new
implementation is compatible with the draft information provided on the
mailing list covering the Exception Management API.
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Break out system register definitions and accessors so that they're
usable by other parts of RTEMS.
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Ensure the stack remains aligned by keeping the context frame at a
multiple of 16 bytes. This avoids stack alignment exceptions which occur
when the stack pointer is not 16 byte aligned.
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The _CPU_ISR_Is_enabled() function operates on ISR cookies and so must
mask off the appropriate status bits. This also fixes the naming of the
parameters of the _CPU_ISR_* functions to indicate use of ISR cookies
instead of interrupt enable/disable levels.
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Run with stack alignment faults enabled under RTEMS_DEBUG to catch any
stack misalignments early. This makes it easier to track them down
should they ever occur.
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The Per_CPU_Control::isr_dispatch_disable is a 32-bit integer.
Close #4206.
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This resolves a warning in the exception frame dump for AArch64 relating
to a missized printf format specifier.
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This ensures that the saved SP register is sized appropriately depending
on the chosen ABI and prevents a warning in the libmisc stack checker.
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Provide RTEMS_NO_RETURN also in case RTEMS_DEBUG is defined to prevent errors
like this:
error: no return statement in function returning non-void [-Werror=return-type]
Use C11 and C++11 standard means to declare a no-return function.
Close #4122.
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This adds a CPU port for AArch64(ARMv8) with support for exceptions and
interrupts.
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