| Commit message (Collapse) | Author | Age | Files | Lines |
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This architecture variant has no MMU.
Update #4202.
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- Parse the ROM taables if present to find the component base for
the debug hardware. This lets the RPi2 run dl09.exe.
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- Fix destorying the target and thread parts.
- Fix the ARM backend to support Cortex-A8 and ARM mode code.
- Use the DBGDSCR interrupt mask when single stepping.
- Use the DBGDSCR method of entry to debug mode to filter the
execptions.
- Add support for BSPs to control the ARM backend.
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Adding support for a register offset table lets FPU registers
be supported if added to the backend.
Closes #3733.
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Update #3254.
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- Add `printk` support to aid multi-core debugging.
- Add lock trace to aid lock debugging.
- Fixes to gcc-7.1 warnings.
- Fixes from ticket #2879.
- Add verbose command controls.
- Change using the RTEMS sys/lock.h API to manage exception threads.
- ARM hardware breakpoint fixes. Support for SMP stepping
is not implemented, this requires use of the context id
register.
Closes #2879.
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Using _Thread_Executing with RTEMS_DEBUG results in an `assert` if
the server accesses invalid memory.
Updates #2993.
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