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The processor mask implementation uses flsl() from <strings.h> which is
only BSD visible. Move the implementation to a separate header file to
hide it from the API level. This fixes build errors with GCC 14.
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Several SMP message processing functions returned a value. This value
was always unused.
Close #4822.
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Directly use "static inline" which is available in C99 and later. This brings
the RTEMS implementation closer to standard C.
Close #3935.
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Add SMP-specifc SMP_FATAL_MULTITASKING_START_ON_NOT_ONLINE_PROCESSOR
fatal error. This fatal error helps to diagnose a broken SMP startup
sequence. Without this error a context switch using the NULL pointer
for the thread control block happens which may be difficult to debug.
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Updates #3053.
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Issue the new fatal SMP error
SMP_FATAL_SCHEDULER_REQUIRES_EXACTLY_ONE_PROCESSOR if the system starts
with not exactly one processor and an uniprocessor scheduler is
configured.
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Use the processor control to specify the target processor since this is what
the callers have available.
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Remove the unused _SMP_Send_message_multicast() and
_SMP_Send_message_broadcast().
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The per-CPU states which control the SMP system initialization were added quite
early during the SMP support development. Replace this initial implementation
with a simplified one. There is no longer a global SMP lock required which
serialized the state changes of all processors. The new implementation better
integrates with the per-CPU jobs.
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This fix relates to a Coverity issue
(PW.USELESS_TYPE_QUALIFIER_ON_RETURN_TYPE).
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Use common phrases for the file brief descriptions.
Update #3706.
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Adjust group identifier and names to be in line with a common pattern.
Use common phrases for the group brief descriptions.
Update #3706.
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Provide RTEMS_NO_RETURN also in case RTEMS_DEBUG is defined to prevent errors
like this:
error: no return statement in function returning non-void [-Werror=return-type]
Use C11 and C++11 standard means to declare a no-return function.
Close #4122.
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Test for the proper system condition instead of using the
rtems_configuration_is_smp_enabled() workaround.
Update #3876.
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All uses were replaced by per-processor jobs.
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Use _SMP_Multicast_action() instead.
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Move resposibility to disable thread dispatching to the caller of
_SMP_Multicast_action(). Using an interrupt disable for this purpose is
questionable.
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Update #3706.
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Use _SMP_Multicast_action() instead.
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Let it work during system initialization.
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Use a FIFO list of jobs per processor to carry out the SMP multicast
action. Use a done indicator per job to reduce the bus traffic a bit.
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Processor_mask is the internal data type to deal with processor sets.
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Update #3706
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Update #3706.
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Add support to temporarily pin a thread to its current processor. This
may be used to access per-processor data structures in critical sections
with enabled thread dispatching, e.g. a pinned thread is allowed to
block.
Update #3508.
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Optimize _SMP_Inter_processor_interrupt_handler() for the common case in
which the inter-processor interrupt is only used to trigger a thread
dispatch.
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Pass current processor control as first parameter to make dependency
more explicit.
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Pass current processor control via parameter since it may be already
available at the caller side.
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A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.
This has at least seven problems:
* The make preinstall step itself needs time and disk space.
* Errors in header files show up in the build tree copy. This makes it
hard for editors to open the right file to fix the error.
* There is no clear relationship between source and build tree header
files. This makes an audit of the build process difficult.
* The visibility of all header files in the build tree makes it
difficult to enforce API barriers. For example it is discouraged to
use BSP-specifics in the cpukit.
* An introduction of a new build system is difficult.
* Include paths specified by the -B option are system headers. This
may suppress warnings.
* The parallel build had sporadic failures on some hosts.
This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.
The new cpukit include directories are:
* cpukit/include
* cpukit/score/cpu/@RTEMS_CPU@/include
* cpukit/libnetworking
The new BSP include directories are:
* bsps/include
* bsps/@RTEMS_CPU@/include
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include
There are build tree include directories for generated files.
The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.
The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.
Update #3254.
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Update #3059.
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Update #3059.
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Implement the Processor_mask via <sys/bitset.h>. Provide
_Processor_mask_To_uint32_t() to enable its use in device specific
routines, e.g. interrupt affinity register in an interrupt controller.
Update #3059.
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The fatal is internal indicator is redundant since the fatal source and
error code uniquely identify a fatal error. Keep the fatal user
extension is internal parameter for backward compatibility and set it to
false always.
Update #2825.
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According to the C11 standard only atomic read-modify-write operations
guarantee that the last value written in modification order is read, see
"7.17.3 Order and consistency". Thus we must use a read-modify-write in
_SMP_Inter_processor_interrupt_handler() to make sure we read an
up-to-date message.
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Update #2554.
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The use case for this is the Cortex-A9 MPCore which has per-processor
registers (only accessible by a particular processor) for the global
timer used by the clock driver. This might be useful for other drivers
as well.
Update #2554.
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According to the C11 and C++11 memory models only a read-modify-write
operation guarantees that we read the last value written in modification
order. Avoid the sequential consistent thread fence and instead use the
inter-processor interrupt to set the thread dispatch necessary
indicator.
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Adds functions that allows the user to specify which cores that should
perform the cache operation. SMP messages are sent to all the specified
cores and the caller waits until all cores have acknowledged that they
have flushed their cache. If CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING is
defined the instruction cache invalidation function will perform the
operation on all cores using the previous method.
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Change message type to unsigned long to match other SMP message functions.
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