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2023-05-20Update company nameSebastian Huber1-1/+1
The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
2022-09-19Do not use RTEMS_INLINE_ROUTINESebastian Huber1-1/+1
Directly use "static inline" which is available in C99 and later. This brings the RTEMS implementation closer to standard C. Close #3935.
2022-03-10cpukit/: Scripted embedded brains header file clean upJoel Sherrill1-6/+0
Updates #4625.
2022-02-28cpukit/include/rtems/score/[a-r]*.h: Change license to BSD-2Joel Sherrill1-3/+22
Updates #3053.
2020-12-02score: Canonicalize Doxygen @file commentsSebastian Huber1-1/+2
Use common phrases for the file brief descriptions. Update #3706.
2020-12-02score: Canonicalize Doxygen groupsSebastian Huber1-4/+6
Adjust group identifier and names to be in line with a common pattern. Use common phrases for the group brief descriptions. Update #3706.
2019-05-13doxygen: score: adjust doc in isrlock.h to doxygen guidelinesAndreas Dachsberger1-2/+2
Update #3706.
2019-04-12score: Add _ISR_lock_Set_name()Sebastian Huber1-0/+15
Add _ISR_lock_Set_name() to optimize the initialization of zero-initialized locks.
2019-04-04doxygen: Rename Score* groups in RTEMSScore*Sebastian Huber1-3/+3
Update #3706
2019-01-18score: Remove unused _ISR_lock_Flash()Sebastian Huber1-31/+0
2019-01-18score: Improve debug support for ISR locksSebastian Huber1-13/+19
Ensure that interrupts are disabled while acquiring an ISR lock.
2018-01-25Remove make preinstallChris Johns1-0/+0
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
2016-11-04score: Optimize self-contained mutexesSebastian Huber1-0/+18
2016-11-04score: Provide inline variants for ISR lock opsSebastian Huber1-0/+32
2016-05-20score: Rename _ISR_Flash() into _ISR_Local_flash()Sebastian Huber1-2/+2
This is a preparation to remove the Giant lock. Update #2555.
2016-05-20score: Rename _ISR_Disable() and _ISR_Enable()Sebastian Huber1-4/+4
Rename _ISR_Disable() into _ISR_Local_disable(). Rename _ISR_Enable() into _ISR_Local_enable(). Remove _Debug_Is_owner_of_giant(). This is a preparation to remove the Giant lock. Update #2555.
2016-05-20score: Rename _ISR_Disable_without_giant()Sebastian Huber1-2/+2
Rename _ISR_Disable_without_giant() into _ISR_Local_disable(). Rename _ISR_Enable_without_giant() into _ISR_Local_enable(). This is a preparation to remove the Giant lock. Update #2555.
2016-05-12score: Add _ISR_lock_Is_owner()Sebastian Huber1-0/+19
2016-02-17score: Avoid unused variable warningsSebastian Huber1-2/+4
2015-05-19score: _Thread_Dispatch_disable_critical()Sebastian Huber1-2/+21
Thread dispatching is disabled in case interrupts are disabled. To get an accurate thread dispatch disabled time it is important to use the interrupt disabled instant in case a transition from an interrupt disabled section to a thread dispatch level section happens.
2015-04-20score: Add _ISR_lock_ISR_disable/enable()Sebastian Huber1-1/+37
2015-04-16score: Add _ISR_lock_Flash()Sebastian Huber1-0/+31
2015-03-05score: C/C++ compatibility macros for ISR locksSebastian Huber1-4/+51
Update #2273.
2015-03-04score: ISR lock C/C++ compatiblity issueSebastian Huber1-65/+63
Empty structures are implementation-defined in C. GCC gives them a size of zero. In C++ empty structures have a non-zero size. Add ISR_LOCK_DEFINE() to define ISR locks for structures used by C and C++. Update #2273.
2014-05-07score: DocumentationSebastian Huber1-2/+6
2014-03-21Change all references of rtems.com to rtems.org.Chris Johns1-1/+1
2014-03-14score: Add SMP lock profiling supportSebastian Huber1-5/+11
2014-03-11score: Add function to destroy SMP locksSebastian Huber1-0/+16
2014-03-11score: Add local context to SMP lock APISebastian Huber1-42/+68
Add a local context structure to the SMP lock API for acquire and release pairs. This context can be used to store the ISR level and profiling information. It may be later used to enable more sophisticated lock algorithms, e.g. MCS locks. There is only one lock that cannot be used with a local context. This is the per-CPU lock since here we would have to transfer the local context through a context switch which is very complicated.
2013-08-01score: ISR lock API changesSebastian Huber1-6/+50
2013-07-31score: Add and use ISR locksSebastian Huber1-0/+141
ISR locks are low-level locks to protect critical sections accessed by threads and interrupt service routines. On single processor configurations the ISR locks degrade to simple ISR disable/enable sequences. No additional storage or objects are required. This synchronization primitive is supported on SMP configurations. Here SMP locks are used.
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