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* libmisc: More useful default configurationSebastian Huber2014-12-057-104/+3
| | | | | | | | | | | The dummy.c was a de-facto default configuration. Rename it to default-configuration.c. Use unlimited objects and the stack checker. This makes it easier for new RTEMS users which will likely use this file if they just work with the usual main() function as the application entry point. Provide proper arguments for main() using the BSP command line. Add spare user extensions and drivers. Do not initialize the network by default. Delete bspinit.c.
* beagle bsp: disable watchdog on am335xBen Gras2014-12-052-0/+15
| | | | | | | | | | | | On recent u-boots, the watchdog is turned on / left enabled. The Beaglebone Black rev. C ships with such a u-boot internally so any application booting from it must disable the watchdog. Therefore this change is needed to boot an RTEMS app out-of-the-box on a BBB Rev C - otherwise the user button must be held during boot (to bypass the stock uboot) or the internal uboot must be updated. To allow for a better out-of-the-box experience, we just turn off the watchdog.
* i386: doxygen and comments related to VESA real mode framebufferJan Dolezal2014-12-048-399/+659
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* i386/pc386: cammelCase (struct and function names) to underscores, typedefed ↵Jan Dolezal2014-12-047-245/+250
| | | | | | | | | | structs, break >80 chars lines, removed newlines at EOFs fb_vesa_rm.c: removed inline from functions declared in fb_vesa.h removed unnecessary printks in the end of patch edid.h, vbe3.h: switched from custom *PACKED_ATTRIBUTE at the structs to the RTEMS_COMPILER_PACKED_ATTRIBUTE for easier maintainability of doxygen
* bsp/leon3: Fix trap table initializationSebastian Huber2014-12-041-1/+2
| | | | Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
* SPARC: optimize IRQ enable & disableDaniel Hellstrom2014-12-045-90/+114
| | | | | | | | | | | | | | | | * Coding style cleanups. * Use OS reserved trap 0x89 for IRQ Disable * Use OS reserved trap 0x8A for IRQ Enable * Add to SPARC CPU supplement documentation This will result in faster Disable/Enable code since the system trap handler does not need to decode which function the user wants. Besides the IRQ disable/enabled can now be inline which avoids the caller to take into account that o0-o7+g1-g4 registers are destroyed by trap handler. It was also possible to reduce the interrupt trap handler by five instructions due to this.
* pc386 bsp fix for default modeBen Gras2014-12-031-2/+2
| | | | | If USE_VBE_RM is 0, vesa_realmode_bootup_init() is not available so the test should be #if instead of #ifdef.
* Move the flash size probe into bankValidate()Nick Withers2014-12-031-4/+5
| | | | Previously, bankValidate() could be called (e.g., BSP_flashWrite() -> regionCheckAndErase() -> argcheck() -> bankValidate()) without the probe having happened. When it then invoked BSP_flashCheckId(), unmapped memory could be read, possibly causing a fatal exception.
* sparc/leon2: LEON_Is_interrupt_masked for Leon2 in leon.h wrongly definedJiri Gaisler2014-12-021-1/+1
| | | | | Condition needs to be inverted, as a 1 in the mask register means that the interrupt is enabled. Solves ticket #1959 in trac.
* sparc/leon3: LEON_Is_interrupt_masked for Leon3 in leon.h wrongly definedJiri Gaisler2014-12-021-3/+1
| | | | | Condition needs to be inverted, as a 1 in the mask register means that the interrupt is enabled. Solves ticket #1958 in trac.
* SPARC: optimize window underflow trapDaniel Hellstrom2014-12-022-9/+16
| | | | | | | | | | | Save five instructions on underflow handling. By using an optimized trap entry we can move instructions from the window underflow function into the trap entry vector. By setting WIM=0 and using RESTORE it is possible to move the new WIM register content from the trapped window into the to-be-restored register window. It is then possible to avoid the WIM write delay.
* SPARC: optimize window overflow trap entryDaniel Hellstrom2014-12-021-0/+1
| | | | | | | | By using a optimized trap entry we can move instructions from the window overflow function into the trap entry vector. By using the saved locals instead of g1 we don't need to save that register temporarily. Also spead out non store instructions inbetween stores to use the write buffer better.
* SPARC: window overflow optimizationDaniel Hellstrom2014-12-022-17/+19
| | | | | I see no need for waiting the 3 instruction delay for wim to be written in this case, since the STD after does not depend on WIM
* m68k/mcf5235: GCC 4.9.2 generates invalid code for Init5235.Chris Johns2014-12-013-13/+26
| | | | | | | Move the vector table copy out of the Init5235 source to avoid stipping the GCC bug. Fixes #2204.
* bsp/qoriq: Delete empty header fileSebastian Huber2014-11-273-5/+0
| | | | close #2062
* bsps/arm: Add .nocache sectionSebastian Huber2014-11-2756-184/+136
| | | | | This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area().
* libchip/serial/z85c30.c: Remove redundant assignmentJosh Oguin2014-11-261-1/+0
| | | | This was flagged by CodeSonar.
* libchip/serial/ns16550* and z8530*: Assert on baud number to avoid divide by 0Josh Oguin2014-11-263-1/+14
| | | | | | This was flagged by CodeSonar. It should be impossible to get an incorrect baud number back but ensure this in debug mode. The _Assert() keeps their scanner from evaluating for divide by 0 past this point.
* libchip/display/disp_hcms29xx.c: Remove useless variable and checkJosh Oguin2014-11-261-6/+1
| | | | This was flagged by CodeSonar.
* libbsp/shared/bspinit.c: Document assumption of NULL returnedJosh Oguin2014-11-261-12/+12
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* rtems: Move rtems_cache_aligned_malloc()Sebastian Huber2014-11-2512-55/+7
| | | | | | Make sure also the size is cache aligned since otherwise we may have some overlap with the next allocation block. A cache invalidate on this area would be fatal.
* bsps/arm: L2C 310 avoid infinite loopsSebastian Huber2014-11-251-0/+8
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* bsp/ngmp: Use -muser-mode GCC optionSebastian Huber2014-11-241-1/+1
| | | | | This option is necessary to use the latest GCC 4.8, 4.9 and 5.0 versions.
* leon2: include <rtems/ringbuf.h> not <ringbuf.h>Joel Sherrill2014-11-231-2/+2
| | | | close #2113
* powerpc/haleakala: Fix warningsJoel Sherrill2014-11-212-1110/+1119
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* powerpc/haleakala: Add network driverNigel Spon2014-11-219-42/+1845
| | | | close 1405
* Delete or rename MIN/MAX macros and definesSebastian Huber2014-11-213-6/+2
| | | | Include <sys/param.h> if necessary to get the MIN()/MAX() macros.
* autotools: regenerate preinstall.am for pc386Gedare Bloom2014-11-201-1/+2
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* i386/pc386: VESA based frame buffer utilizing real mode interrupt 10hJan Dolezal2014-11-206-0/+1021
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* i386/pc386/include: header files for VESA BIOS EXTENSIONS and VESA Extended ↵Jan Dolezal2014-11-204-0/+986
| | | | Display Identification Data
* i386/shared/realmode_int: real mode interrupt interfaceJan Dolezal2014-11-204-0/+497
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* i386: global descriptor table manipulation functionsJan Dolezal2014-11-202-40/+207
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* i386: GDTR manipulation functions parameters changed to use explicit width typesJan Dolezal2014-11-202-5/+7
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* i386/pc386: configurable size of descriptor tablesJan Dolezal2014-11-206-8/+51
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* bsps/arm: Enable L2C for Cortex-A9 MPCore BSPsSebastian Huber2014-11-2011-65/+98
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* bsps/arm: L2C 310 drop exclusive cache supportSebastian Huber2014-11-201-71/+50
| | | | Optimize locking.
* bsps/arm: L1 cache support changesSebastian Huber2014-11-201-16/+21
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* bsps/arm: L2C 310 compile-time errata 588369Sebastian Huber2014-11-201-49/+19
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* bsps/arm: L2C 310 compile-time errata 753970Sebastian Huber2014-11-201-71/+43
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* bsps/arm: L2C 310 exclusive config is fatalSebastian Huber2014-11-202-8/+18
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* bsps/arm: L2C 310 use l2c_310_* prefix throughoutSebastian Huber2014-11-201-99/+99
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* bsps/arm: L2C 310 use L2C_310_* prefix throughoutSebastian Huber2014-11-201-232/+232
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* bsps/arm: L2C 310 add compile time checksSebastian Huber2014-11-204-85/+80
| | | | Simplify initialization. Replace some assert() with fatal errors.
* bsps/arm: L2C 310 delete invalid linkSebastian Huber2014-11-201-2/+0
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* bsps/arm: L2C 310 simplify and remove white spaceSebastian Huber2014-11-201-292/+177
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* bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASESebastian Huber2014-11-203-28/+28
| | | | Rename BSP_ARM_L2CC_BASE to BSP_ARM_L2C_310_BASE.
* bsp/xilinx-zynq: Add Cadence I2C bus driverSebastian Huber2014-11-206-0/+645
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* bsp/xilinx-zynq: Add zync_clock_cpu_1x()Sebastian Huber2014-11-203-2/+14
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* bsp/xilinx-zynq: Rename BSP_ARM_A9MPCORE_UARTCLKSebastian Huber2014-11-202-5/+5
| | | | | Rename BSP_ARM_A9MPCORE_UARTCLK to ZYNQ_CLOCK_UART since this clock has nothing to do with the Cortex-A9 MPCore.
* bsp/xilinx-zynq: Adjust BSP_ARM_A9MPCORE_PERIPHCLKSebastian Huber2014-11-201-1/+1
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