| Commit message (Collapse) | Author | Age | Files | Lines |
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Add ability to place data in a non-loadable cache-inhibited area.
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Closes #2435.
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Also regenerate preinstall.am. Closes #2434.
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updates 2254.
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closes #2432.
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Only the context of the console device was used and this is wrong in
case more than one APBUART device is available.
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See also bc820946793426dbdc450dc8bba4a15d01006182.
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This avoids consumption of a loadable address space for the nocache
heap.
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According to the C11 and C++11 memory models only a read-modify-write
operation guarantees that we read the last value written in modification
order. Avoid the sequential consistent thread fence and instead use the
inter-processor interrupt to set the thread dispatch necessary
indicator.
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Further documentation can be found in
https://devel.rtems.org/wiki/GSoC/2015/RaspberryPi_peripherals_and_SD_card
and test data (including sample user applications, device drivers and wiring schemes) can be found in
https://github.com/asuol/RTEMS_rpi_testing
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flush_data_cache uses R0 directly but doesn't list it as a clobbered
register. Compiling with -O3 made this code break, since the function
that calls flush_data_cache already uses r0.
closes #2416.
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Close #2385.
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Updates #2405.
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GPIO Driver Development for BeagleBone Black based on the generic GPIO API
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makes rtems_gpio_bsp_get_value return uint32_t. Motivation: simplify
beagle gpio implementation for common gpio apio.
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Added support for the new RTEMS GPIO API functions.
Test cases can be found in https://github.com/asuol/RTEMS_rpi_testing/tree/master/GPIO
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Changes relative to the previous patch set:
- Moved GPIO pin interrupts to rtems chains, instead of a local linked list;
- Restructured the pin tracking structure, separating the interrupt information for each pin meaning that a pin without any interrupt enabled only requires 8 bytes, while keeping interrupt information (handling information, handler chain control, ...) requires 24 additional bytes (total of 32 bytes per pin with interrupts enabled);
- Added support for 'parallel' pin function assignment, allowing the function assignment to be set for multiple pins in a single GPIO hardware call. If a BSP does not support this feature it becomes a sequence of individual calls per pin. Also added support for GPIO pin groupings, allowing to write and read byte data to a series of pins which behave as a single entity;
- Added bank tracking structure to maintain the bank lock and bank level interrupt information (threaded/normal handling, interrupt counter);
- Changed GPIO settings to BSP defined constants, reducing dynamic memory allocation;
- Switched interrupt tasks for a rtems interrupt server, with the possibility of using normal interrupts (user handlers being called within ISR context).
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closes #2379.
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This would lead to link-time errors in case less specialized compiler
machine options are used, e.g. to run the GCC test suite.
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Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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there is no need to define access macros for field covering
whole registers. In addition, BSP_FLD32 does not work right
for field 32bit length.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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Close #2373.
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Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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The update fixes breakage of TMS570 support after Alexander Krutwig
switch of RTEMS time read to timecounter mechanism
bsps: Convert clock drivers to use a timecounter
Mechanism to specify odd (non 1 Mhz) time base update frequencies
implemented after objections of Martin Galvan.
Code is adjusted to convert RTEMS configuration parameter
microseconds_per_tick to such odd base if
TMS570_PREFERRED_TC_FREQUENCY is specified appropriately.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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The header files are generated by script make_header.py.
Current script's version can be found at:
https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python
Registers offsets and fields have been extracted from reference manual.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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