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2014-12-01m68k/mcf5235: GCC 4.9.2 generates invalid code for Init5235.Chris Johns3-13/+26
Move the vector table copy out of the Init5235 source to avoid stipping the GCC bug. Fixes #2204.
2014-11-27bsp/qoriq: Delete empty header fileSebastian Huber3-5/+0
close #2062
2014-11-27bsps/arm: Add .nocache sectionSebastian Huber56-184/+136
This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area().
2014-11-26libchip/serial/z85c30.c: Remove redundant assignmentJosh Oguin1-1/+0
This was flagged by CodeSonar.
2014-11-26libchip/serial/ns16550* and z8530*: Assert on baud number to avoid divide by 0Josh Oguin3-1/+14
This was flagged by CodeSonar. It should be impossible to get an incorrect baud number back but ensure this in debug mode. The _Assert() keeps their scanner from evaluating for divide by 0 past this point.
2014-11-26libchip/display/disp_hcms29xx.c: Remove useless variable and checkJosh Oguin1-6/+1
This was flagged by CodeSonar.
2014-11-26libbsp/shared/bspinit.c: Document assumption of NULL returnedJosh Oguin1-12/+12
2014-11-25rtems: Move rtems_cache_aligned_malloc()Sebastian Huber12-55/+7
Make sure also the size is cache aligned since otherwise we may have some overlap with the next allocation block. A cache invalidate on this area would be fatal.
2014-11-25bsps/arm: L2C 310 avoid infinite loopsSebastian Huber1-0/+8
2014-11-24bsp/ngmp: Use -muser-mode GCC optionSebastian Huber1-1/+1
This option is necessary to use the latest GCC 4.8, 4.9 and 5.0 versions.
2014-11-23leon2: include <rtems/ringbuf.h> not <ringbuf.h>Joel Sherrill1-2/+2
close #2113
2014-11-21powerpc/haleakala: Fix warningsJoel Sherrill2-1110/+1119
2014-11-21powerpc/haleakala: Add network driverNigel Spon9-42/+1845
close 1405
2014-11-21Delete or rename MIN/MAX macros and definesSebastian Huber3-6/+2
Include <sys/param.h> if necessary to get the MIN()/MAX() macros.
2014-11-20autotools: regenerate preinstall.am for pc386Gedare Bloom1-1/+2
2014-11-20i386/pc386: VESA based frame buffer utilizing real mode interrupt 10hJan Dolezal6-0/+1021
2014-11-20i386/pc386/include: header files for VESA BIOS EXTENSIONS and VESA Extended ↵Jan Dolezal4-0/+986
Display Identification Data
2014-11-20i386/shared/realmode_int: real mode interrupt interfaceJan Dolezal4-0/+497
2014-11-20i386: global descriptor table manipulation functionsJan Dolezal2-40/+207
2014-11-20i386: GDTR manipulation functions parameters changed to use explicit width typesJan Dolezal2-5/+7
2014-11-20i386/pc386: configurable size of descriptor tablesJan Dolezal6-8/+51
2014-11-20bsps/arm: Enable L2C for Cortex-A9 MPCore BSPsSebastian Huber11-65/+98
2014-11-20bsps/arm: L2C 310 drop exclusive cache supportSebastian Huber1-71/+50
Optimize locking.
2014-11-20bsps/arm: L1 cache support changesSebastian Huber1-16/+21
2014-11-20bsps/arm: L2C 310 compile-time errata 588369Sebastian Huber1-49/+19
2014-11-20bsps/arm: L2C 310 compile-time errata 753970Sebastian Huber1-71/+43
2014-11-20bsps/arm: L2C 310 exclusive config is fatalSebastian Huber2-8/+18
2014-11-20bsps/arm: L2C 310 use l2c_310_* prefix throughoutSebastian Huber1-99/+99
2014-11-20bsps/arm: L2C 310 use L2C_310_* prefix throughoutSebastian Huber1-232/+232
2014-11-20bsps/arm: L2C 310 add compile time checksSebastian Huber4-85/+80
Simplify initialization. Replace some assert() with fatal errors.
2014-11-20bsps/arm: L2C 310 delete invalid linkSebastian Huber1-2/+0
2014-11-20bsps/arm: L2C 310 simplify and remove white spaceSebastian Huber1-292/+177
2014-11-20bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASESebastian Huber3-28/+28
Rename BSP_ARM_L2CC_BASE to BSP_ARM_L2C_310_BASE.
2014-11-20bsp/xilinx-zynq: Add Cadence I2C bus driverSebastian Huber6-0/+645
2014-11-20bsp/xilinx-zynq: Add zync_clock_cpu_1x()Sebastian Huber3-2/+14
2014-11-20bsp/xilinx-zynq: Rename BSP_ARM_A9MPCORE_UARTCLKSebastian Huber2-5/+5
Rename BSP_ARM_A9MPCORE_UARTCLK to ZYNQ_CLOCK_UART since this clock has nothing to do with the Cortex-A9 MPCore.
2014-11-20bsp/xilinx-zynq: Adjust BSP_ARM_A9MPCORE_PERIPHCLKSebastian Huber1-1/+1
2014-11-20bsps/arm: Adjust stacks for ARMv4Sebastian Huber2-19/+7
Reduce non-IRQ stacks to size zero. All non-IRQ stacks overlap now the IRQ stack. This is all right since the SVC stack is used only during startup and here interrupts are disabled. The other exception stacks lead to a system termination by default, so we can here also use the IRQ stack since interrupts are disabled on exception entry.
2014-11-20ARM removed shared/abort from several ARM BSPsAlan Cudmore6-54/+55
2014-11-05lpc23xx_tli800-testsuite.tcfg: Add dl02Joel Sherrill1-0/+1
2014-11-05lpc2362-testsuite.tcfg: Add dl02Joel Sherrill1-0/+1
2014-11-05lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Add a handful more testsJoel Sherrill1-0/+8
2014-11-05lm3s3749-testsuite.tcfg: Add dl02Joel Sherrill1-0/+1
2014-11-04lpc23xx_tli800-testsuite.tcfg: Add dl01Joel Sherrill1-0/+1
2014-11-04lpc2362-testsuite.tcfg: Add dl01Joel Sherrill1-0/+1
2014-11-04lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Add rbheap01Joel Sherrill1-0/+1
2014-11-04lm3s3749-testsuite.tcfg: Add dl01Joel Sherrill1-0/+1
2014-11-04Regenerated preinstall.am file.Chris Johns1-0/+1
2014-11-03BSP for several Beagle productsBen Gras36-3221/+1485
Specifically the beagleboard, beagleboard xM, beaglebone, beaglebone black. More info on these targets: http://www.beagleboard.org/ This commit forms a basic BSP by combining Claas's work with . new clock and irq code and definitions for beagle targets (beagleboard and beaglebones), mostly reused from the Minix codebase, thus making irqs, ticks and non-polled console mode work too . new timer code for ns timing with high timer resolution, 24MHz on the AM335X and 13MHz on the DM37XX . select the console uart based on target at configure time . removing all the lpc32xx-specific macros and code and other unused code and definitions that the beagle bsp was based on . re-using some standard functions instead of lpc32xx versions . fixed some whitespace problem in preinstall.am . fixed some compile warnings . configure MMU: set 1MB sections directly in the TTBR, just to show the difference between cacheable RAM and non-cacheable device memory and invalid ranges; this lets us turn on caches and not rely on boot loader MMU configuration. Verified to work when MMU is initially either on or off when RTEMS gets control. Thanks for testing, commentary, improvements and fixes to Chris Johns, Brandon Matthews, Matt Carberry, Romain Bornet, AZ technology and others. Signed-Off-By: Ben Gras <beng@shrike-systems.com>
2014-11-03Added BeagleBoard BSPClaas Ziemke29-0/+4596
Coding done in course of GSoC2012. Commit edited to be brought up-to-date with mainline by Ben Gras <beng@shrike-systems.com>.
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-17 05:16:52 +0000