Commit message (Collapse) | Author | Age | Files | Lines | |
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* | bsp/sparc: Move BSP_ISR_handler to a separate file and rename it | Daniel Cederman | 2015-02-11 | 9 | -23/+59 |
| | | | | | | | This allows it to be wrapped by another function at link-time and can be used to trace interrupts. If not placed in a separate file, the function pointer address used in BSP_shared_interrupt_init will be resolved at compile-time, and the function will not be wrappable. | ||||
* | Filesystem: Delete unused fsmountme_h handler | Sebastian Huber | 2015-02-09 | 1 | -1/+0 |
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* | arm/tms570: sci context has to be writable because it holds state variable. | Pavel Pisa | 2015-02-04 | 2 | -4/+4 |
| | | | | | | | | | | | | | | The structure tms570_sci_context holds state variable tx_chars_in_hw which holds if and how many characters (in the optional FIFO support for some Ti SCIs) are submitted into hardware. When field is not writable then code breaks when RTEMS is build for Flash area. The problem found and analyzed by Martin Galvan from tallertechnologies. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||||
* | bsps/powerpc: Fix a clock driver | Nick Withers | 2015-01-30 | 1 | -9/+57 |
| | | | | | | | PowerPC Book E: Account for an extra tick period if a tick increment's pending. Close #2230. | ||||
* | mcf5206elite/include/i2c.h: Fix spelling error | Joel Sherrill | 2015-01-23 | 1 | -1/+1 |
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* | stm32f4/.../stm32f105rc-testsuite.tcfg: Add more tests | Joel Sherrill | 2015-01-23 | 1 | -0/+1 |
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* | lpc24xx/.../lpc23xx_tli800-testsuite.tcfg: Add more tests | Joel Sherrill | 2015-01-23 | 1 | -0/+7 |
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* | lpc24xx/.../lpc2362-testsuite.tcfg: Add more tests | Joel Sherrill | 2015-01-23 | 1 | -0/+2 |
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* | lm3s69xx/.../lm3s6965-testsuite.tcfg: Add more tests | Joel Sherrill | 2015-01-23 | 1 | -0/+1 |
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* | lm3s69xx/.../lm3s3749-testsuite.tcfg: Add more tests | Joel Sherrill | 2015-01-23 | 1 | -0/+2 |
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* | bsp/altera-cyclone-v: Use proper free function | Sebastian Huber | 2015-01-23 | 1 | -1/+1 |
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* | bsps/sparc: Use calloc() | Sebastian Huber | 2015-01-23 | 1 | -3/+1 |
| | | | | Close #2242. | ||||
* | bsps/powerpc: Fix switch statement in CPU ident | Sebastian Huber | 2015-01-23 | 1 | -0/+2 |
| | | | | Close #2237. | ||||
* | libchip: Fix high capacity detection for MMC | Sebastian Huber | 2015-01-23 | 1 | -1/+1 |
| | | | | Close #2239. | ||||
* | grspw: descriptor tables no longer statically allocated | javamonn | 2015-01-22 | 1 | -7/+7 |
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* | Filesystem: Delete node type operation | Sebastian Huber | 2015-01-22 | 1 | -7/+8 |
| | | | | Use the fstat handler instead. | ||||
* | powerpc: Fix AltiVec VSCR save/restore | Sebastian Huber | 2015-01-20 | 1 | -4/+6 |
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* | bsps/powerpc: Fix conditional compilation | Sebastian Huber | 2015-01-14 | 1 | -3/+1 |
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* | bsp/mcf5206elite: Remove <i2c.h> inlude in <bsp.h> | Sebastian Huber | 2015-01-14 | 2 | -3/+1 |
| | | | | This prevents a compile-time error in libtests/i2c01. | ||||
* | libcpu/powerpc/mpc6xx/mmu/bat.c: Now compiles with gcc 5.x | Joel Sherrill | 2015-01-13 | 1 | -12/+12 |
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* | bsp/qoriq: Add T2080RDB and T4240RDB variants | Sebastian Huber | 2015-01-13 | 24 | -318/+714 |
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* | powerpc: AltiVec and FPU context support | Sebastian Huber | 2015-01-13 | 7 | -12/+821 |
| | | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size. | ||||
* | bsps/powerpc: Use e500 exc categories for e6500 | Sebastian Huber | 2015-01-13 | 1 | -0/+1 |
| | | | | This is not correct, but works for now. | ||||
* | moxiesim: Add conditional logic to handle old and new gas syntax | Anthony Green | 2015-01-10 | 2 | -2/+21 |
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* | powerpc: Use PPC_HAS_FPU | Sebastian Huber | 2015-01-09 | 1 | -6/+6 |
| | | | | Provide floating point context support only if PPC_HAS_FPU == 1. | ||||
* | powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500 | Sebastian Huber | 2015-01-09 | 1 | -15/+11 |
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* | powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZE | Sebastian Huber | 2015-01-09 | 1 | -8/+2 |
| | | | | | Use it for the default PPC_CACHE_ALIGNMENT. Use it for PPC_STRUCTURE_ALIGNMENT. | ||||
* | powerpc: Use alternate time base for CPU counter | Sebastian Huber | 2015-01-09 | 1 | -1/+1 |
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* | bsp/qoriq: Fix nanoseconds extension | Sebastian Huber | 2015-01-09 | 1 | -4/+17 |
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* | bsp/qoriq: Increase MAS0[ESEL] width | Sebastian Huber | 2015-01-09 | 1 | -3/+3 |
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* | bsp/qoriq: Add MAS7 support for MMU | Sebastian Huber | 2015-01-09 | 7 | -21/+50 |
| | | | | | This enables usage of the full real address space which is 40-bit on the T2080 for example. | ||||
* | bsps/powerpc: ppc_exc_initialize_interrupt_stack() | Sebastian Huber | 2015-01-09 | 2 | -11/+20 |
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* | bsps/powerpc: Add TMR access macros | Sebastian Huber | 2015-01-09 | 1 | -0/+28 |
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* | bsps/powerpc: Add cache size functions | Sebastian Huber | 2015-01-09 | 1 | -0/+46 |
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* | bsps/powerpc: Delete C pre-processor warning | Sebastian Huber | 2015-01-09 | 1 | -2/+0 |
| | | | | Do not warn about not implemented cache functions. | ||||
* | bsps/powerpc: Support for 64 byte cache lines | Sebastian Huber | 2015-01-09 | 1 | -6/+23 |
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* | bsps/powerpc: Support a cache alignment of 64 | Sebastian Huber | 2015-01-09 | 1 | -1/+8 |
| | | | | Give the BSP the ability to define PPC_CACHE_ALIGNMENT. | ||||
* | bsps/powerpc: Support e6500 indentification | Sebastian Huber | 2015-01-09 | 2 | -0/+12 |
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* | bsps/u-boot: Add optional text and data sections | Sebastian Huber | 2015-01-09 | 1 | -4/+12 |
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* | bsps/u-boot: Update due to API changes | Sebastian Huber | 2015-01-09 | 3 | -7/+155 |
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* | bsps/mpc83xx: Fix warnings | Sebastian Huber | 2015-01-09 | 1 | -4/+5 |
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* | smp: Add and use _SMP_Should_start_processor() | Sebastian Huber | 2015-01-09 | 2 | -10/+2 |
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* | pc386: Add Edison base support | Joel Sherrill | 2015-01-04 | 12 | -17/+220 |
| | | | | | | | | | The current support for the Edison supports a single polled UART for input and output plus a simulated clock tick. The activities forward for supporting the Edison have been posted on the RTEMS mailing lists and at: http://rtemsramblings.blogspot.com/2014/12/intel-edison-and-rtems-road-forward.html | ||||
* | clock_driver_simidle.c: Add BSP_CLOCK_DRIVER_DELAY | Joel Sherrill | 2015-01-04 | 1 | -0/+10 |
| | | | | | | | | | This allows the BSP to define an optional spin delay which is useful for making time appear to pass at a rate closer to wall time. On the Edison, this was used with a polled console driver to slow polling to a reasonable rate and make time pass reasonably close to correctly even with no clock tick support. | ||||
* | pc386: Add BSP_ENABLE_COM1_COM4 BSP option | Joel Sherrill | 2015-01-04 | 3 | -27/+38 |
| | | | | | | This allows the support for the legacy COM1-COM4 serial ports to be completely disabled. It is needed to prevent hangs on some hardware. In particular, the Intel Edison where it is not present. | ||||
* | pc386: Add BSP_ENABLE_IDE BSP option | Joel Sherrill | 2015-01-04 | 4 | -1/+13 |
| | | | | | | This allows the IDE support to be completely disabled. It is needed to prevent hangs on some hardware. In particular, the Intel Edison where it is not present. | ||||
* | pc386: Add BSP_ENABLE_VGA BSP option | Joel Sherrill | 2015-01-04 | 7 | -36/+69 |
| | | | | | | This allows the VGA and keyboard console to be completely disabled. It is useful on PCs without displays and prevents a very slow boot time on the Intel Edison. | ||||
* | Use fixed-width C99 types for PowerPC in_be16() and co. | Nick Withers | 2014-12-23 | 24 | -175/+185 |
| | | | | | | Also use the const qualifier on the address pointer's target in in_*() Closes #2128 | ||||
* | pc386: scan all functions of multi-function PCI devices | Till Strauman | 2014-12-23 | 1 | -7/+23 |
| | | | | | | | | | | | | | | | | | | | The current algorithm scans all PCI busses (0..ff) and all devices (0..31) on each bus for bridges and determines the maximum of all subordinate busses encountered. However, the algorithm does not scan all functions present in multi-function devices -- I have a PCI express root complex (82801H) where multiple (non-zero index) functions are 'PCI bridges' whose subordinate bus number is missed by the original algorithm. This commit makes sure that the scan is extended to all functions of multi-function devices. See #2067 | ||||
* | bsp/moxiesim: Add cache manager implementation | Sebastian Huber | 2014-12-17 | 1 | -0/+5 |
| | | | | Close #2220. |