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* shared/console-polled.c: Use standard fatal error codesJoel Sherrill2016-07-051-3/+3
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* bsps/arm: Fix basic cache support for SMPSebastian Huber2016-07-051-8/+8
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* Beaglebone: Update PWM driver imported from BBBIOPunit Vara2016-07-044-386/+611
| | | | | | This patch adapts the previously added Beaglebone PWM code from BBBIO to RTEMS. This work was done in the context of the Google Summer of Code 2016, and further patches will follow to improve the code quality and documentation.
* Beaglebone: Add original BBBIO PWM driverPunit Vara2016-07-042-0/+448
| | | | | | | | | This patch adds the PWM driver code for the Beaglebone Black from BBBIO: https://github.com/VegetableAvenger/BBBIOlib/blob/master/BBBio_lib/BBBiolib_PWMSS.c This commit is for tracking purposes only; the next commit will adapt the code for RTEMS.
* bsps/arm: basic on core cache support changed to use l1 functions.Pavel Pisa2016-07-043-48/+97
| | | | | | | | | | | | | | The basic data and instruction rage functions should be compatible for all ARMv4,5,6,7 functions. On the other hand, some functions are not portable, for example arm_cp15_data_cache_test_and_clean() and arm_cp15_data_cache_invalidate() for all versions and there has to be specialized version for newer cores. arm_cache_l1_properties_for_level uses CCSIDR which is not present on older chips. Actual version is only experimental, needs more changes and problem has been found on RPi1 with dlopen so there seems to be real problem.
* bsps/arm: Change code to explicit selection of cache implementation for ARM ↵Pavel Pisa2016-07-0410-124/+190
| | | | | | | | | | | | | | | | | | | | | | | BSPs. The original ARM architecture wide cache_.h is changed to dummy version for targets not implementing/enablig cache at all. The ARM targets equipped by cache should include appropriate implementation. Next options are available for now c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h basic ARM cache integrated on the CPU core directly which requires only CP15 oparations c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h support for case where ARM L2C-310 cache controller is used. It is accessible as mmaped peripheral. c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h Cortex-M specific cache support
* bsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310.Pavel Pisa2016-07-041-0/+4
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* rtems+bsps/cache: Define cache manager operations for code synchronization ↵Pavel Pisa2016-07-041-0/+42
| | | | | | | | | | | | | | and maximal alignment. There is need for unambiguous named and defined cache function which should be called when code is updated, loaded or is self-modifying. There should be function to obtain maximal cache line length as well. This function can and should be used for allocations which can be used for data and or code and ensures that there are no partial cache lines overlaps on start and end of allocated region.
* arm/raspberrypi: update VideoCore cache flush workaround to work on RPi2.Pavel Pisa2016-07-041-2/+13
| | | | | The arm_cp15_data_cache_clean_and_invalidate leads to hang on RPi2, clean by individual lines works on RPi1 and RPi2.
* arm/raspberrypi: Enable HYP to SVC switch for this BSP.Pavel Pisa2016-07-042-0/+7
| | | | | This support is required when newer firmware is used on Raspberry Pi 2 boards.
* bsps/arm: Support recent bootloaders starting kernel in HYP modePavel Pisa2016-07-045-7/+175
| | | | | | | | | | | | | | | | | | | When HYP mode is detected at startup then setup HYP mode vectors table (for future extensions) clean exceptions switching to HYP mode and switch CPU to ARM SVC mode. BSPs which want to use this support need to include next option in their configure.ac RTEMS_BSPOPTS_SET([BSP_START_IN_HYP_SUPPORT],[*],[1]) RTEMS_BSPOPTS_HELP([BSP_START_IN_HYP_SUPPORT], [Support start of BSP in ARM HYP mode]) AM_CONDITIONAL(BSP_START_IN_HYP_SUPPORT,test "$BSP_START_IN_HYP_SUPPORT" = "1") and need to include next lines in corresponding Makefile.am if BSP_START_IN_HYP_SUPPORT libbsp_a_SOURCES += ../shared/startup/bsp-start-in-hyp-support.S endif
* arm/score and shared: define ARM hypervisor mode and alternate vector table ↵Pavel Pisa2016-07-041-0/+30
| | | | | | | | | base access. The main reason for inclusion of minimum hypervisor related defines is that current ARM boards firmware and loaders (U-boot for example) start loaded operating system kernel in HYP mode to allow it take control of virtualization (Linux/KVM for example).
* bsp/atsam: Add RTC driverAlexander Krutwig2016-07-042-1/+104
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* libchip: Simplify RTC driverSebastian Huber2016-07-0414-39/+13
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* bsps: Do not use fast idle clock for SMPSebastian Huber2016-06-301-13/+15
| | | | | We may have more than one idle thread. Thus, the clock driver fast idle logic would be a bit more complicated.
* bsp/atsam: Add support for TCMAlexander Krutwig2016-06-295-0/+150
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* score: Fix SMP message handlingSebastian Huber2016-06-292-6/+0
| | | | | | | | According to the C11 standard only atomic read-modify-write operations guarantee that the last value written in modification order is read, see "7.17.3 Order and consistency". Thus we must use a read-modify-write in _SMP_Inter_processor_interrupt_handler() to make sure we read an up-to-date message.
* arm/raspberrypi: resolve BSP warnings.Pavel Pisa2016-06-285-2/+8
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* arm/raspberrypi: run VideoCore and mailbox code through rtems.uncrustify.Pavel Pisa2016-06-285-246/+266
| | | | | | Some changes have been reverted to keep readability. For example squash of BCM2835_MBOX_TAG_* defines which are visually aligned in column.
* arm/raspberrypi: Adding functionalities to Mailbox RPiMudit Jain2016-06-283-0/+99
| | | | | Added functions for retrieving firmware revision, board model and board revision.
* bsp/mvme162: Include missing <rtems/bspIo.h>Sebastian Huber2016-06-281-0/+1
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* libnetworking: Import current <arpa/inet.h>Christian Mauderer2016-06-287-8/+0
| | | | | | | | | | Import the <arpa/inet.h> from current FreeBSD. Necessary due to changes in <netinet/in.h>. Remove BSD hack from <arpa/inet.h>. Clean up problems with htonl(). These functions are defined in <arpa/inet.h>. This lead to some problems because they are defined in <rtems/endian.h> too. Add NTOHL, ... to <rtems/rtems_bsdnet_internal.h>.
* bsps: Include missing <rtems/bspIo.h>Sebastian Huber2016-06-2412-0/+18
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* arm/raspberrypi: Force VC mail box buffer to be synchronized through cache.Pavel Pisa2016-06-241-1/+13
| | | | | This solution is quick fix until CPU_DATA_CACHE_ALIGNMENT is defined and cache manager is checked on all Raspberry Pi variants.
* bsp/atsam: Add I2C driverAlexander Krutwig2016-06-236-0/+585
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* bsp/atsam: Fix QSPI driver APIAlexander Krutwig2016-06-222-3/+3
| | | | We support read/write of arbitrary buffers.
* sparc: Optimize CPU counter supportSebastian Huber2016-06-223-15/+6
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* Move printer initialization to separate headerSebastian Huber2016-06-222-1/+2
| | | | | | The RTEMS print user need to know nothing about a particular printer implementation. In particular get rid of the <stdio.h> include which would be visible via <rtems.h>.
* Make rtems/print.h independent of rtems/bspIo.hSebastian Huber2016-06-222-1/+2
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* bsp/tms570: regenerate preinstall makefile by bootstrap -p.Pavel Pisa2016-06-211-0/+8
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* bsp/tms570: include complete peripheral initialization to SCI driver.Pavel Pisa2016-06-211-2/+36
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* bsp/tms570: update pinmux to provide support for initialization lists and ↵Pavel Pisa2016-06-214-69/+196
| | | | clear of alt outputs.
* bsp/tms570: include package balls and PINMMR registers mapping for ↵Pavel Pisa2016-06-212-0/+700
| | | | TMS570LS3135ZWT chip.
* bsp/leon3: Add up counter timecounterSebastian Huber2016-06-212-7/+36
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* bsp/leon3: Fix interrupt timestampingSebastian Huber2016-06-211-20/+35
| | | | Close #2684.
* sparc: Rework CPU counter supportSebastian Huber2016-06-216-71/+120
| | | | | Rework CPU counter support to enable use of the GR740 up-counter via %asr22 and %asr23.
* bsp/leon3: Fix LEON3_Cpu_Index initializationSebastian Huber2016-06-213-4/+14
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* arm/raspberrypi: Ensure that buffers used for VC mail box communication are ↵Pavel Pisa2016-06-202-7/+56
| | | | synchronized through cache.
* bsp/leon3: Use sysinit for bsp_debug_uart_init()Sebastian Huber2016-06-203-7/+8
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* bsp/leon3: Use sysinit for amba_initialize()Sebastian Huber2016-06-203-8/+8
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* bsps: Fix printk() format warningSebastian Huber2016-06-171-1/+1
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* bsps: Fix MPCI_Fatal() prototypeSebastian Huber2016-06-172-4/+4
| | | | Close #2742.
* libchip/shmdr/send.c: Fix warning and clean upJoel Sherrill2016-06-161-15/+21
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* libchip/shmdr/poll.c: Fix warning and clean upJoel Sherrill2016-06-161-5/+8
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* mvme147s/shmsupp/mpisr.c: Fix warnings and clean upJoel Sherrill2016-06-161-12/+10
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* mvme147s/shmsupp/getcfg.c: Fix warningJoel Sherrill2016-06-161-1/+1
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* bsps: Add CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSORSebastian Huber2016-06-143-7/+31
| | | | | | | | | Add CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR clock driver option. If defined, then do the clock tick processing on the boot processor on behalf of all other processors. Currently, this is intended as a workaround for a Qemu shortcoming on ARM. Update #2737.
* bsp/qoriq: Increase reserved size for FDTSebastian Huber2016-06-131-1/+1
| | | | Some boards require this size.
* bsp/irq-server: Fix install/removeSebastian Huber2016-06-131-135/+173
| | | | | | | | Do not wait for the interrupt server while owning the allocator lock. This could lead to deadlock in case one of interrupt service routines or user extensions want to obtain the allocator mutex as well. Instead let the interrupt server do the install/remove job entirely on behalf of the requesting task.
* bsps/powerpc: Update to RTEMS printer changesSebastian Huber2016-06-091-8/+8
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