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* mcf5206elite/include/i2c.h: Fix spelling errorJoel Sherrill2015-01-231-1/+1
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* stm32f4/.../stm32f105rc-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+1
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* lpc24xx/.../lpc23xx_tli800-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+7
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* lpc24xx/.../lpc2362-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+2
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* lm3s69xx/.../lm3s6965-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+1
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* lm3s69xx/.../lm3s3749-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+2
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* bsp/altera-cyclone-v: Use proper free functionSebastian Huber2015-01-231-1/+1
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* bsps/sparc: Use calloc()Sebastian Huber2015-01-231-3/+1
| | | | Close #2242.
* bsps/powerpc: Fix switch statement in CPU identSebastian Huber2015-01-231-0/+2
| | | | Close #2237.
* libchip: Fix high capacity detection for MMCSebastian Huber2015-01-231-1/+1
| | | | Close #2239.
* grspw: descriptor tables no longer statically allocatedjavamonn2015-01-221-7/+7
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* Filesystem: Delete node type operationSebastian Huber2015-01-221-7/+8
| | | | Use the fstat handler instead.
* powerpc: Fix AltiVec VSCR save/restoreSebastian Huber2015-01-201-4/+6
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* bsps/powerpc: Fix conditional compilationSebastian Huber2015-01-141-3/+1
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* bsp/mcf5206elite: Remove <i2c.h> inlude in <bsp.h>Sebastian Huber2015-01-142-3/+1
| | | | This prevents a compile-time error in libtests/i2c01.
* libcpu/powerpc/mpc6xx/mmu/bat.c: Now compiles with gcc 5.xJoel Sherrill2015-01-131-12/+12
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* bsp/qoriq: Add T2080RDB and T4240RDB variantsSebastian Huber2015-01-1324-318/+714
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* powerpc: AltiVec and FPU context supportSebastian Huber2015-01-137-12/+821
| | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
* bsps/powerpc: Use e500 exc categories for e6500Sebastian Huber2015-01-131-0/+1
| | | | This is not correct, but works for now.
* moxiesim: Add conditional logic to handle old and new gas syntaxAnthony Green2015-01-102-2/+21
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* powerpc: Use PPC_HAS_FPUSebastian Huber2015-01-091-6/+6
| | | | Provide floating point context support only if PPC_HAS_FPU == 1.
* powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500Sebastian Huber2015-01-091-15/+11
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* powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZESebastian Huber2015-01-091-8/+2
| | | | | Use it for the default PPC_CACHE_ALIGNMENT. Use it for PPC_STRUCTURE_ALIGNMENT.
* powerpc: Use alternate time base for CPU counterSebastian Huber2015-01-091-1/+1
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* bsp/qoriq: Fix nanoseconds extensionSebastian Huber2015-01-091-4/+17
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* bsp/qoriq: Increase MAS0[ESEL] widthSebastian Huber2015-01-091-3/+3
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* bsp/qoriq: Add MAS7 support for MMUSebastian Huber2015-01-097-21/+50
| | | | | This enables usage of the full real address space which is 40-bit on the T2080 for example.
* bsps/powerpc: ppc_exc_initialize_interrupt_stack()Sebastian Huber2015-01-092-11/+20
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* bsps/powerpc: Add TMR access macrosSebastian Huber2015-01-091-0/+28
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* bsps/powerpc: Add cache size functionsSebastian Huber2015-01-091-0/+46
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* bsps/powerpc: Delete C pre-processor warningSebastian Huber2015-01-091-2/+0
| | | | Do not warn about not implemented cache functions.
* bsps/powerpc: Support for 64 byte cache linesSebastian Huber2015-01-091-6/+23
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* bsps/powerpc: Support a cache alignment of 64Sebastian Huber2015-01-091-1/+8
| | | | Give the BSP the ability to define PPC_CACHE_ALIGNMENT.
* bsps/powerpc: Support e6500 indentificationSebastian Huber2015-01-092-0/+12
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* bsps/u-boot: Add optional text and data sectionsSebastian Huber2015-01-091-4/+12
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* bsps/u-boot: Update due to API changesSebastian Huber2015-01-093-7/+155
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* bsps/mpc83xx: Fix warningsSebastian Huber2015-01-091-4/+5
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* smp: Add and use _SMP_Should_start_processor()Sebastian Huber2015-01-092-10/+2
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* pc386: Add Edison base supportJoel Sherrill2015-01-0412-17/+220
| | | | | | | | | The current support for the Edison supports a single polled UART for input and output plus a simulated clock tick. The activities forward for supporting the Edison have been posted on the RTEMS mailing lists and at: http://rtemsramblings.blogspot.com/2014/12/intel-edison-and-rtems-road-forward.html
* clock_driver_simidle.c: Add BSP_CLOCK_DRIVER_DELAYJoel Sherrill2015-01-041-0/+10
| | | | | | | | | This allows the BSP to define an optional spin delay which is useful for making time appear to pass at a rate closer to wall time. On the Edison, this was used with a polled console driver to slow polling to a reasonable rate and make time pass reasonably close to correctly even with no clock tick support.
* pc386: Add BSP_ENABLE_COM1_COM4 BSP optionJoel Sherrill2015-01-043-27/+38
| | | | | | This allows the support for the legacy COM1-COM4 serial ports to be completely disabled. It is needed to prevent hangs on some hardware. In particular, the Intel Edison where it is not present.
* pc386: Add BSP_ENABLE_IDE BSP optionJoel Sherrill2015-01-044-1/+13
| | | | | | This allows the IDE support to be completely disabled. It is needed to prevent hangs on some hardware. In particular, the Intel Edison where it is not present.
* pc386: Add BSP_ENABLE_VGA BSP optionJoel Sherrill2015-01-047-36/+69
| | | | | | This allows the VGA and keyboard console to be completely disabled. It is useful on PCs without displays and prevents a very slow boot time on the Intel Edison.
* Use fixed-width C99 types for PowerPC in_be16() and co.Nick Withers2014-12-2324-175/+185
| | | | | | Also use the const qualifier on the address pointer's target in in_*() Closes #2128
* pc386: scan all functions of multi-function PCI devicesTill Strauman2014-12-231-7/+23
| | | | | | | | | | | | | | | | | | | The current algorithm scans all PCI busses (0..ff) and all devices (0..31) on each bus for bridges and determines the maximum of all subordinate busses encountered. However, the algorithm does not scan all functions present in multi-function devices -- I have a PCI express root complex (82801H) where multiple (non-zero index) functions are 'PCI bridges' whose subordinate bus number is missed by the original algorithm. This commit makes sure that the scan is extended to all functions of multi-function devices. See #2067
* bsp/moxiesim: Add cache manager implementationSebastian Huber2014-12-171-0/+5
| | | | Close #2220.
* bsp/beagle: Fix some warningsBen Gras2014-12-155-3/+6
| | | | | | | The extra includes in console_*.c are to solve a 'no previous prototype' warning. Solves #2212 in trac.
* mcf5225x-testsuite.tcfg: Add fileioJoel Sherrill2014-12-151-0/+1
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* bsp/mpc55xxevb: Fix warningsSebastian Huber2014-12-152-2/+10
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* bsp/t32mppc: Fix warningsSebastian Huber2014-12-152-5/+8
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