summaryrefslogtreecommitdiffstats
path: root/c (follow)
Commit message (Collapse)AuthorAgeFilesLines
* changed version to 980819Joel Sherrill1998-08-192-2/+2
|
* Patch from Eric Valette <valette@crf.canon.fr>:Joel Sherrill1998-08-194-58/+86
| | | | | | | - Use the "hlt" instruction for the Idle thread, - Optimise interrupt PATH leadding to thread wakeup, - Preparation for Intel exception management that should come before the end of the week...
* Fixed obsolete reference to BSDINSTALL.Joel Sherrill1998-08-191-1/+1
|
* Patch from Aleksey <qqi@world.std.com>:Joel Sherrill1998-08-192-10/+45
| | | | | | | | | | | | This patch has same changes as one I sent to you earlier plus it fixes _heap_size problem for pc386 we had discussed earlier. Now, _heap_size is defined and set to 0 in pc386/startup/bspstart.c It can be patched to desireable value in binary image. If it is left unpatched, then startup code will determine size of memory (on the assumption that at least 2MB are present) and use max possible heap.
* Patch from Aleksey <qqi@world.std.com>:Joel Sherrill1998-08-198-21/+34
| | | | | | It fixes netboot build problem, KA9Q configuration for pc386, some compiler wardning, it also removed some stuff ifdef'ed with '#if 0'.
* Patches from Ralf Corsepius <corsepiu@faw.uni-ulm.de> and myself toJoel Sherrill1998-08-198-13/+12
| | | | | | | | | | | | | | | | | | | | | | | | make solaris target buildable. > 1. The ipc check fails since solaris does not define union semun. > The unix port code actually defines this type itself on solaris. Doing > the same thing lets it get configured. Then... > 2. It looks like BSDINSTALL is not defined properly. BSDINSTALL is defined in make/host.cfg.in as BSDINSTALL=@INSTALL@ @INSTALL@ is generated by autoconf's standard macro AC_PROG_INSTALL, which is widely used in almost any autoconf/automake configured package. In case there is really something wrong with it, then it must be considered a bug in autoconf. I can see a doubious fragment in AC_PROG_INSTALL, which is used when no appropriate bsd-install is found. Finally Ralf saw a problem with the find on solaris which I also saw and fixed.
* Added 68060 definition from Chris Johns.Joel Sherrill1998-08-191-0/+17
|
* If 0 out the code which touches the chip in questionable ways for processingJoel Sherrill1998-08-141-0/+6
| | | | a giant packet.
* Changed tm27 clear interrupt macro on all PPC BSPs except the papyrus.Joel Sherrill1998-08-141-0/+5
|
* Added information on caching.Joel Sherrill1998-08-141-0/+13
|
* Updated.Joel Sherrill1998-08-141-1/+1
|
* Fixed version referenceJoel Sherrill1998-08-131-1/+1
|
* Updated.Joel Sherrill1998-08-131-181/+179
|
* Fixed preinstall stanza so the prebuild works.Joel Sherrill1998-08-131-3/+3
|
* base line -- copied from erc32Joel Sherrill1998-08-131-0/+193
|
* Enable TX interrupts only when we need TDAs.Joel Sherrill1998-08-131-1/+0
|
* Cleaned up some debugging stuff.Joel Sherrill1998-08-131-23/+15
| | | | Redid interrupt handler to read imr/isr once and to write the imr once.
* Don't disable the RX/TX on close in polled mode.Joel Sherrill1998-08-132-4/+6
| | | | Fixed a comment.
* Per request from Chris Johns <ccj@acm.org>, I added code to detectJoel Sherrill1998-08-131-3/+3
| | | | | when the bare bsp was enabled without setting both --enable-cpu-model and --enable-cpu-cflags.
* Patch from Chris Johns <ccj@acm.org> to change the way in which the initialJoel Sherrill1998-08-131-2/+5
| | | | stack pointers are saved.
* Patch from Chris Johns <ccj@acm.org>. Comments follow:Joel Sherrill1998-08-131-0/+19
| | | | | | | | | | | Here is a small patch which allows the m68060 to be used. I have not tested the FP switching stuff which we know is broken. This is taken against the libchip snapshot but should merge without problems. If you have any problems please let me know. There are other smaller issues such as superscalar enable and cache control which I have not addressed yet. They are different to all other m68k processors. These can wait IMO.
* fixed spacingJoel Sherrill1998-08-131-16/+14
|
* Removed spurious prints and cleaned up XXX.Joel Sherrill1998-08-121-11/+10
|
* Added more debug information. There are probably debug prints left in.Joel Sherrill1998-08-121-24/+53
| | | | | Fixed one important bug. After wrapping the RX Descriptors all had the EOL bit set which resulted in everything slowing down massively.
* Fixed bug where the last link of the RDA was not initialized properly.Joel Sherrill1998-08-121-15/+30
|
* Added SONIC_DEBUG_DESCRIPTORS and changed debug level.Joel Sherrill1998-08-111-3/+11
|
* Survives 16-20 packets. Appears to be ok on TX buffer management.Joel Sherrill1998-08-101-11/+16
| | | | Problem appears to be on the RX buffer initialization side.
* Added printsJoel Sherrill1998-08-101-1/+2
|
* Can now reply to multiple successive pings successfully without being inJoel Sherrill1998-08-102-29/+22
| | | | | | promiscuous mode. It still dies somewhere between 16 and 20 pings.
* replies to ping -- forced into prosmiscuous modeJoel Sherrill1998-08-101-13/+21
|
* Reordered some stuff.Joel Sherrill1998-08-081-7/+10
|
* changed version to 980808Joel Sherrill1998-08-082-2/+2
|
* Corrected spacing.Joel Sherrill1998-08-081-1/+1
|
* Changed debug level.Joel Sherrill1998-08-082-36/+96
| | | | | | | | | | | | | | | | Moved CAM Descriptor types to sonic.h. CAM memory is now malloced to insure it shares the same upper address bits. Removed increment of RX interrupt count on TX interrupt path. Added SONIC_DEBUG_FRAGMENTS and SONIC_DEBUG_CAM conditionals. Fixed bugs in fragment manipulation. First bug was that the pad overwrote the last fragment. The second bug was that the link information overwrote the size of the last fragment. Rewrote initialization of TDA to simplify it.
* changed version to 9800808Joel Sherrill1998-08-082-2/+2
|
* Removed SonicRegisters structure since we now use register indicesJoel Sherrill1998-08-061-83/+15
| | | | | | | | and access routines. Added revision constants. Added in_use and EOL field values.
* Enabled specific types of debug info.Joel Sherrill1998-08-061-31/+55
| | | | | | | | | | | | Added pointer to RDA to sonic structure. Added macro names for values used in the in_use field of RDA entries. Rewrote the RX Descriptor Area initialization loop. Added a check to barf if this is a Rev B sonic chip. Enabled check that the CAM was properly loaded.
* Changed debug enable macros to support individually enabling differentJoel Sherrill1998-08-061-15/+30
| | | | | | | types of debug information. Removed call to rtems_panic which was based on checking a variable which was no longer being set.
* Card Resource Register was a 16-bit register not a 32-bit one.Joel Sherrill1998-08-065-28/+36
| | | | Used existing constants for bits on the register.
* Added support for the Card Resource Register. The new probe routinesJoel Sherrill1998-08-065-8/+107
| | | | | check for the presence of the DUART, SCC, and RTC. The SONIC check needs to be added in the future as the network driver is libchip'ed.
* Commented out the code which yields the CPU when the serial controller isJoel Sherrill1998-08-056-0/+12
| | | | | busy. This type of behavior perturbs the tests and many of them will not pass.
* Added constants which made the multiple bit settings more readableJoel Sherrill1998-08-051-0/+25
| | | | for the Data Configuration Register (DCR).
* DCR setting changed to match what the DY-4 Firmware initialized it to.Joel Sherrill1998-08-051-135/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This primarily included setting the state of the programmable outputs and the RX and TX FIFO depths. Moved all of the TX, RX, and RRA data structure initialization to before the hardware initialization. As part of this, the hardware initialization was consolidated. More than likely, some of this movement broke stuff. Used constants added to sonic.h which gave more logical names to some of the register bit settings. Switched to calloc to insure the data areas where initialized to 0. Commented out a panic check in the RX server which may or may not have been right. Increased the size of the CAM initialization area. It is possible that this could be decreased or code added to handle the management of multiple hardware addresses. Added sonic read and write register routines which aid greatly in debugging and provide the core for the eventual movement of this driver to libchip. Added debug code to the read and write register routines which can print the value read from or written to a register. This code also prints the register name which significantly eases reading the log.
* Patch from Eric Valette <valette@crf.canon.fr> which brings the i386ex BSPJoel Sherrill1998-08-0527-578/+379
| | | | inline with the new IRQ structure.
* Automatic CPU type detection code from Eric Valette <valette@crf.canon.fr>.Joel Sherrill1998-08-0515-30/+696
| | | | Enabled on the pc386.
* Fixed name of Buffer so this would compile.Joel Sherrill1998-08-051-3/+3
|
* Redid Makefiles to properly do a preinstall. There was remnants of theJoel Sherrill1998-08-0511-62/+20
| | | | old way of setting th cpu family and model string names.
* Added print of the order in which the directories are preinstalled.Joel Sherrill1998-08-051-1/+9
|
* Switched to read/write register routines and added some basic debugJoel Sherrill1998-08-032-332/+473
| | | | help.
* Under allcoated task stacks.Joel Sherrill1998-08-031-1/+1
|
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-28 03:24:50 +0000