| Commit message (Collapse) | Author | Age | Files | Lines |
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file to Makefile.am.
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<corsepiu@faw.uni-ulm.de> that migrates the SH port to
multilib'ing. This patch involved moving a number of
files in the CVS repository, adding new files, and
deleting files from their previous location. Ralf
gave good instructions (not repeated here) and here
are his notes:
Note 1: In this version, I did not change the installation points of
the headers which are moved inside of the source-tree. This is a
temporary hack for not breaking compatibility with 4.5 based BSPs,
but will probably not last once having real multilibs (We would have
include file conflicts when several BSPs/CPU_MODELS share a common
installation prefix).
Note 2: I hope not to have broken too much, but I would not be
astonished if something goes wrong.
Note 3: There are more patches to come :)
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mpc8xx libcpu support for the first time and remove includes
of bsp.h, references to BSP_Configuration, and Cpu_table. All
of these can be obtained directly from RTEMS now.
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responsibility to explicitly pick up the components they
require. This makes it easier to override default implmentations.
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score/cpu/powerpc.
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shared source code.
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have them.
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now is an implementation of the prototypes in rtems/rtems/cache.h.
The libcpu/i386/wrapup directory is no longer needed.
The PowerPC needs this done to it.
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from cvs by adding .cvsignore files.
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of all FIO constants and conflict with libnetworking code.
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<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860.
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<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860
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something indicates this. Eventually this needs to be merged into
gcc.
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location in libc.
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to do polled IO on a single port with VERY little support code.
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by gdb 5.0's i960 simulator) is enough to run hello world.
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adds .cvsignore.
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adds .cvsignore.
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Gauthier <charles.gauthier@nrc.ca>. The power supply in their
VMEbus cage died so it was submitted at this point. It passes ttcp
which is a really good sign but they would like to do more testing
and cleanup once their hardware is functional again. Please
contact them if you are interested in using or fixing this driver.
As their comments indicate, the performance is actually quite good
even at this point as indicated by the ttcp results.
Please note that this is by no means a final version. The code is still
fairly ugly, and will require some further fixing. On the bright side, what
is attached works. I finally ran the test programs successfully with
optimized code and data cache enabled:
netdemos worked, but failed on the UDP transfer (runs out of buffers).
ttcp worked, with something like 1036 KB/sec Rx, 952 KB/sec Tx.
tftp worked
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linkcmds updated, simio references removed, and switch to libchip for
serial ports from simio.
Added a MEMORY_MAP file to capture information about the various
addresses on this board.
In addition, many of the beta patches are now included.
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Java folks including Oscar Martinez de la Torre <omt@wm.estec.esa.nl>.
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Bob Wisdon <bobwis@ascweb.co.uk> and Chris Johns <ccj@acm.org>
to resolve a random network lockup problem.
ckinit.c:
Occasional network lockups have been noted when the PIT has a higher
interrupt request level than the CPM. The SCC1 bit in the CISR is set
even though the SCC1 interrupt handler is not active. This blocks
interrupts from SCC1 (and all other CPM sources) and locks up the
system. It has not been determined whether the error is within the
68360 or in the RTEMS interrupt support assembler code. The solution,
for now, is to set both PIT and CPM interrupt request levels to the same
value (4).
network.c:
Set CPM transmitter buffer pointer (_tbptr) to beginning of frame
before restarting transmitter. Don't retire transmitter buffer
descriptors belonging to the restarted frame.
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that contains:
* Removes remaining (now illegal) references to $(SRC) from a couple of
Makefile.ams
* Removes duplicate AC_CONFIG_SUBDIRS macro from c/configure.in
* Moves ENABLE_LIBCDIR into RTEMS_PROG_C[C|XX]_FOR_TARGET (hides LIBCDIR
from most configure scripts, i.e. LIBCDIR becomes less visible)
* Adds RTEMS_PROG_C[C|XX]_FOR_TARGET and RTEMS_CANONICALIZE_TOOLS to
libbsp/*/configure.ins (A minor bug in previous implementations, which
only has an impact when switching to GNU/Cygnus canonicalization)
* Cleans up several bogus comments.
* Removes MKLIB
* Switches the version number to 4.5.0 (for testing version number
handling)
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when setting up receive buffer descriptors and when unmasking interrupts.
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that contains the automake files for libnetworking plus a couple of
minor fixes. [Now only one unused/unsupported Makefile.in remains
(./c/src/lib/libbsp/hppa1.1/pxfl/Makefile.in).]
To apply:
patch -p1 < rtems-rc-20000118-7.diff
/bin/sh rtems-rc-20000118-7.rm
/bin/sh rtems-rc-20000118-7.add
./bootstrap
Notes:
* I have tested this one by building all BSPs for m68k, powerpc, sh and
unix with toolchains built since last weekend.
* I did not touch libnetworking's directory layout.
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