summaryrefslogtreecommitdiffstats
path: root/c/src/lib (follow)
Commit message (Collapse)AuthorAgeFilesLines
* score: Add CPU counter supportSebastian Huber2014-02-1450-5/+243
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* bsps/arm: Fix Cortex-A9 MPCore nanoseconds handlerSebastian Huber2014-02-131-1/+1
|
* score: Change debug helper functionsSebastian Huber2014-02-121-1/+1
| | | | | | | | Rename rtems_internal_error_description() to rtems_internal_error_text(). Rename rtems_fatal_source_description() to rtems_fatal_source_text(). Rename rtems_status_code_description() to rtems_status_text(). Remove previous implementation of rtems_status_text().
* sparc: Save/restore only non-volatile contextSebastian Huber2014-02-121-15/+4
| | | | | | | | | | The _CPU_Context_switch() is a normal function call. The following registers are volatile (the caller must assume that the register contents are destroyed by the callee) according to "SYSTEM V APPLICATION BINARY INTERFACE - SPARC Processor Supplement", Third Edition: g1, o0, o1, o2, o3, o4, o5. Drop these registers from the context. Ensure that offset defines match the structure offsets.
* bsps/sparc: Fix ambapp_find_by_idx()Sebastian Huber2014-02-111-1/+1
| | | | The expression "*pi++" post-increments the pointer (not the value).
* bsps/arm: Use Global Timer for Cortex-A9 MPCoreSebastian Huber2014-02-105-29/+78
| | | | | | Use the Global Timer for the Cortex-A9 MPCore clock driver instead of the Private Timer. This enables a consistent nanoseconds since last context switch value across all processors.
* bsps/arm: Include missing header fileSebastian Huber2014-02-103-3/+7
|
* Revert "bsp/leon3: New BSP variant leon3_qemu"Sebastian Huber2014-02-079-99/+0
| | | | | | This reverts commit 7579e255127ee0cf04901bbab6c1538559053508. Improve QEMU to support AMBA plug and play instead.
* bsp/leon3: New BSP variant leon3_qemuSebastian Huber2014-02-069-0/+99
|
* bsp/leon3: Declare bsp_debug_uart_init() in headerSebastian Huber2014-02-063-5/+5
| | | | Do not return a status.
* score: _CPU_Context_switch_to_first_task_smp()Sebastian Huber2014-02-051-28/+0
| | | | | Delete _CPU_Context_switch_to_first_task_smp() and use _CPU_Context_restore() instead.
* bsps: Delete unused bsp_smp_delay()Sebastian Huber2014-02-052-27/+0
|
* bsp/leon3: Avoid magic delays for IPI broadcastSebastian Huber2014-02-051-5/+3
|
* bsp/leon3: Fix SMP initializationSebastian Huber2014-02-053-51/+34
| | | | | | | Avoid usage of the same stack area by multiple secondary processors at the same time. Avoid magic delay loops.
* bsp/leon3: Install IPI handler earlySebastian Huber2014-02-051-7/+4
| | | | | | | | Install inter-processor interrupt (IPI) handler before secondary CPUs are started. This ensures that secondary CPUs fetch the newly installed handler. Remove superfluous return statement.
* bsp/leon3: Use printk() only if debug is enabledSebastian Huber2014-02-051-9/+10
|
* bsps/sparc: Fix commentSebastian Huber2014-02-051-1/+1
|
* bsps/sparc: Remove confusing nopSebastian Huber2014-02-041-1/+0
|
* bsps/sparc: Order load/store by increasing offsetsSebastian Huber2014-02-041-7/+7
| | | | This may increase the cache hit performance.
* bsps/sparc: Fix commentsSebastian Huber2014-02-041-3/+1
|
* bsp/leon3: Console driver changesSebastian Huber2014-02-043-68/+56
| | | | | Move declaration of global variables and functions to <leon.h> header file. Make several global variables and functions static.
* bsp/leon3: Avoid copy and paste in console driverSebastian Huber2014-02-041-39/+23
|
* bsp/leon3: Fix interrupt-driven console driverSebastian Huber2014-02-041-72/+98
|
* Add thread-local storage (TLS) supportSebastian Huber2014-02-041-3/+13
| | | | | Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
* bsps: Thread-local storage (TLS) for linkcmdsSebastian Huber2014-02-0479-44/+1279
|
* bsp/v850: Use proper ABI in linkcmdsSebastian Huber2014-02-041-3/+3
|
* bsp/xilinx_zynq: Support configuraton of memory map. Remove SMP variants.Chris Johns2014-02-0216-149/+89
| | | | | | | | | | Generate a linker command file from configure letting the user override the defaults to suite their custom needs. Refer to configure.ac for the details. Remove the SMP variants and let --enable-smp control if a BSP is built for SMP. Make USE_FAST_IDLE 1 only for the realview qemu BSP.
* bootcard.c: Comment clean upJoel Sherrill2014-01-311-5/+5
|
* bsps/sparc: Fix linkcmds part of new network stackSebastian Huber2014-01-301-3/+3
|
* bsps: Fix barrier section definitionsSebastian Huber2014-01-302-6/+6
|
* bsp/stm32f4: Use BSP_SMALL_MEMORY for a variantSebastian Huber2014-01-301-0/+1
|
* bsp/lpc24xx: Fix compile errorSebastian Huber2014-01-301-1/+1
|
* powerpc/flash: give string variables const attributeNick Withers2014-01-235-22/+22
|
* Add warnings to MOTLoad-equipped BSPs' READMEs that a "waitProbe", "netShut" ↵Nick Withers2014-01-233-0/+16
| | | | sequence must be executed in MOTLoad before booting RTEMS to remove its network interface interrupt handlers, lest memory corruption occur
* libbsp sh: Add Doxygen file header to coverhd.hCynthia Rempel2014-01-142-2/+14
|
* libbsp powerpc: Add Doxygen file header to coverhd.hCynthia Rempel2014-01-147-7/+49
|
* libbsp mips: Add Doxygen file header to coverhd.hCynthia Rempel2014-01-141-1/+7
|
* libbsp m68k: Add Doxygen file header to coverhd.hCynthia Rempel2014-01-147-6/+48
|
* rtems_cache_invalidate_multiple_instruction_linesAleksandr Platonov2014-01-141-1/+1
| | | | | | | | According with comment in rtems_cache_invalidate_multiple_instruction_lines(), final_address indicates the last address which needs to be invalidated. But if in while loop we got final_address == i_addr condition then loop breaks and final_address will not be invalidated.
* bsps/arm: Use _ARMV4_Exception_interruptSebastian Huber2014-01-141-3/+3
| | | | | This allows read-only vector tables in ROM. It avoids also an unsolved problem with MMU/cache synchronization on SMP.
* bsps/arm: Use Normal memory for code and dataSebastian Huber2014-01-131-3/+7
|
* bsps/arm: Use ALIGN_WITH_INPUTSebastian Huber2014-01-133-130/+90
| | | | | | | | | | | | | The ALIGN_WITH_INPUT helps to make this linker script more reliable. See also: https://sourceware.org/ml/binutils/2013-06/msg00246.html https://sourceware.org/binutils/docs-2.24/ld/Forced-Output-Alignment.html#Forced-Output-Alignment This reverts commit 4a9e52eefc510d7022ddc61c4ecde8db6b9a0217. This reverts commit 1ab4f76900d012b5a9dbce2851add060f11ce13a.
* bsp/lpc24xx: Add PL111 supportSebastian Huber2014-01-104-0/+165
|
* bsp/lpc24xx: Add register definitionSebastian Huber2014-01-101-1/+3
|
* bsp/realview-pbx-a9: Fix PL111 color encodingSebastian Huber2014-01-101-1/+2
|
* bsps/arm: Use handlers for PL111 set up/tear downSebastian Huber2014-01-103-18/+35
|
* libbsp tm27.h: Add Doxygen file header to all tm27.hCynthia Rempel2014-01-0922-35/+135
|
* sparc BSP shared: Improve DoxygenToma Radu2014-01-0919-49/+147
| | | | Add doxygen to the header files in sparc/shared/include directory.
* PR 1548: ERC32 console stops working when UART error flags are setGerardo Puga2014-01-091-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Problem: The console works fine when only transmitting data from the ERC32, but stops working after a while when receiving data. "Stops working" means, bytes are neither sent nor received from the UART, but the rest of the system keeps functioning (task are executing, the operative system is responsive, etc). Context: - When an RX error occurs, the ERC32 UARTS stop generating RX/TX interrupts until the corresponding error flag in the UART_STATUS are cleared. - The console.c code currently cleans the error flags from the console_isr_x subroutines, but those are NOT called when an RX error occurs. Thus the error flag is never cleaned and then the UARTs stop generating interrupts indefinitely. - The ERC32 UARTs generate a different interrupt when an RX error occurs. Fixed by: - Adding a third interrupt service routine console_isr_error to handle the UART_ERROR trap. This isr cleans the error flags of the channels. - Cleaning the error flags manually just after having initialized the interrupt vectors. This is because if the error flag was already set by the time the interrupt vectors are configured, the interrupts might never be called.
* powerpc/mvme3100: Improve DoxygenSzkocsovszki Zsolt2014-01-086-9/+83
|