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Update #3254.
Update #3260.
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Update #3254.
Update #3268.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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Update #3254.
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This is a cache manager implementation header file.
Update #3254.
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Update #3254.
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Update #3254.
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Due to a new rtems_panic() implementation, it is possible to replace the
PowerPC-specific BSP_panic() with rtems_panic(). Remove BSP_panic()
implementations.
Close #3245.
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For the SPE support we must store the upper half of r3 as well.
Update #3085.
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Use the saved MSR to account for FPU and AltiVec settings.
Update #2811.
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Update #3082.
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Implement thread dispatch code in ppc_exc_wrapup() similar to
ppc_exc_interrupt().
Update #2811.
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Fix link-time error on BSPs not using PPC_EXC_CONFIG_USE_FIXED_HANDLER.
Update #3085.
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Make PPC_EXC_CONFIG_USE_FIXED_HANDLER mandatory for BSPs using
ppc_exc_interrupt(). Pass exception number to bsp_interrupt_dispatch()
to allow processing of decrementer and doorbell exceptions as hypervisor
guest.
Update #3085.
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Remove old ISR parameter since is not used by the clock driver shell.
Make an implementation optional.
Update #3139.
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The BSP_output_char should output a char and not mingle with high level
processing, e.g. '\n' to '\r\n' translation. Move this translation to
rtems_putc(). Remove it from all the BSP_output_char implementations.
Close #3122.
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Update #2133.
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In 64-bit mode, the linker must have the ability to restore the TOC
pointer after an external function call.
Update #3082.
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Add 64-bit support for LA.
Update #3082.
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Rename ppc_exc_wrap_async_normal_end to ppc_exc_interrupt_end to avoid a
bit of obfuscation.
Update #3082.
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Update #3082.
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Update #3082.
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Update #3082.
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Update #3090.
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Make Clock_driver_support_shutdown_hardware() optional. This avoids
the atexit() support on memory constrained targets.
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Use a specific define for the interrupt exception frame size.
Update #3082.
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Rename ppc_exc_wrap_async_normal to ppc_exc_interrupt to avoid a bit of
obfuscation.
Update #3082.
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Avoid use of small-data area, since it is not supported in the ELFv2 ABI
by GCC.
Update #3082.
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The SPARC ABI is a bit special with respect to the floating point context.
The complete floating point context is volatile. Thus, from an ABI point
of view nothing needs to be saved and restored during a context switch.
Instead the floating point context must be saved and restored during
interrupt processing. Historically, the deferred floating point switch was
used for SPARC and the complete floating point context is saved and
restored during a context switch to the new floating point unit owner.
This is a bit dangerous since post-switch actions (e.g. signal handlers)
and context switch extensions may silently corrupt the floating point
context.
The floating point unit is disabled for interrupt handlers. Thus, in case
an interrupt handler uses the floating point unit then this will result in a
trap (INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT).
In uniprocessor configurations, a lazy floating point context switch is
used. In case an active floating point thread is interrupted (PSR[EF] == 1)
and a thread dispatch is carried out, then this thread is registered as the
floating point owner. When a floating point owner is present during a
context switch, the floating point unit is disabled for the heir thread
(PSR[EF] == 0). The floating point disabled trap checks that the use of the
floating point unit is allowed and saves/restores the floating point context
on demand.
Update #3077.
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Fix infinite loop in rtems_invalidate_multiple_instruction_lines().
Implement this function.
Close #3080.
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This patch adds NOP instructions to prevent instruction sequences
that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009:
"LEON3FT Stale Cache Entry After Store with Data Tag Parity Error"
for more information.
The sequences are only modified if __FIX_LEON3FT_B2BST is defined.
The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc,
and -mfix-ut699 GCC flags that prevents the sensitive sequences from
being generated.
Update #3057.
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Change bsp_interrupt_vector_enable() and bsp_interrupt_vector_disable()
to not return a status code. Add bsp_interrupt_assert() and use it to
validate the vector number in the vector enable/disable implementations.
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Update ticket #2891 and my GSOC project
add c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c
modify c/src/lib/libbsp/arm/beagle/include/i2c.h
modify c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h
modify c/src/lib/libcpu/arm/shared/include/am335x.h
modify c/src/lib/libbsp/arm/beagle/Makefile.am
Now can read the EEPROM by i2c, the test application link is: https://github.com/hahchenchen/GSOC-test-application
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There is no need to save the thread pointer in _CPU_Context_switch()
since it is a thread invariant. It is initialized once in
_CPU_Context_Initialize().
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Closes #3015.
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- All references of %0 changed to %g0
- 'call label,0' changed to 'call label'. According to the sparc
specification call does not take any registers
- '.seg "text"' changed to '.section ".text"'
- the synonym stub is replaced with stb
- the synonym stuh is replaced with sth
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