summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libcpu (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Add a new necessary definition needed for raspberrypi MMU supportHesham AL-Matary2013-10-031-0/+21
| | | | | | | | | | | The new ARM_CP15_CTRL_XP is necessary to share ARMv6 and ARMv7 page-table formats and definitions. It enables the extended page tables (introduced in ARMv6) to be configured for the hardware page translation mechanism. This way we can share ARMv6 and ARMv7 page tables entry formats. Other Fault Status Register Definitions can be useful for debugging or excpetion handlers.
* libcpu/sparc/.../access_le.c: Add include file to fix warningJoel Sherrill2013-09-231-0/+1
|
* bsps: Fix cache manager supportSebastian Huber2013-09-103-0/+12
|
* bsps/arm: Fix ARM CP15 opcode for get functionsSebastian Huber2013-09-051-3/+3
|
* sapi: SMP support for chainsSebastian Huber2013-08-301-1/+1
| | | | | | | | Add ISR lock to chain control for proper SMP protection. Replace rtems_chain_extract() with rtems_chain_explicit_extract() and rtems_chain_insert() with rtems_chain_explicit_insert() on SMP configurations. Use rtems_chain_explicit_extract() and rtems_chain_explicit_insert() to provide SMP support.
* bsp/xilinx-zynq: Add cache supportRic Claus2013-08-261-1/+18
|
* bsps/arm: Add more CP15 cache functionsRic Claus2013-08-221-0/+65
|
* bsps: Fix clock driver definesSebastian Huber2013-08-142-3/+3
|
* bsps/powerpc: Per-CPU thread dispatch disableSebastian Huber2013-08-093-53/+45
| | | | Interrupt support for per-CPU thread dispatch disable level.
* score: Per-CPU thread dispatch disable levelSebastian Huber2013-08-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a per-CPU thread dispatch disable level. So instead of one global thread dispatch disable level we have now one instance per processor. This is a major performance improvement for SMP. On non-SMP configurations this may simplifiy the interrupt entry/exit code. The giant lock is still present, but it is now decoupled from the thread dispatching in _Thread_Dispatch(), _Thread_Handler(), _Thread_Restart_self() and the interrupt entry/exit. Access to the giant lock is now available via _Giant_Acquire() and _Giant_Release(). The giant lock is still implicitly acquired via _Thread_Dispatch_decrement_disable_level(). The giant lock is only acquired for high-level operations in interrupt handlers (e.g. release of a semaphore, sending of an event). As a side-effect this change fixes the lost thread dispatch necessary indication bug in _Thread_Dispatch(). A per-CPU thread dispatch disable level greatly simplifies the SMP support for the interrupt entry/exit code since no spin locks have to be acquired in this area. It is only necessary to get the current processor index and use this to calculate the address of the own per-CPU control. This reduces the interrupt latency considerably. All elements for the interrupt entry/exit code are now part of the Per_CPU_Control structure: thread dispatch disable level, ISR nest level and thread dispatch necessary. Nothing else is required (except CPU port specific stuff like on SPARC).
* bsp/csb336: implement bsp_interrupt_vector_enable/disable.Pavel Pisa2013-08-091-0/+10
| | | | Signed-off-by: Pavel Pisa <ppisa@pikron.com>
* score: Rename tod.h to todimpl.hSebastian Huber2013-08-011-1/+1
|
* bsp/csb336: mc9328mxl correct AITC access in bsp_interrupt_dispatch.Pavel Pisa2013-07-261-1/+2
| | | | | | | | | | | The original version is missing void and result is that (*x >> 16) is optimized to ldh rX,[rY]. But it is not allowed/supported to access bus/address range used by AITC by other than 32 bit wide accesses and 16-bit access results in the data abort exception. The corrected version works on real hardware and is even more readable. Signed-off-by: Pavel Pisa <ppisa@pikron.com>
* score: Merge tod implementation into one fileSebastian Huber2013-07-261-0/+1
| | | | | Delete TOD_MICROSECONDS_PER_SECOND, TOD_MICROSECONDS_TO_TICKS() and TOD_MILLISECONDS_TO_TICKS().
* Include missing <rtems/score/threaddispatch.h>Sebastian Huber2013-07-266-8/+11
|
* bsp/mpc55xx: Fix prototypePeter Dufault2013-07-241-1/+1
|
* score: Merge sysstate API into one fileSebastian Huber2013-07-241-0/+1
|
* bsp/mpc55xx: Add MPC5668G supportSebastian Huber2013-07-157-13/+6770
|
* bsps/powerpc: Add ppc_count_leading_zeros()Sebastian Huber2013-07-091-0/+13
|
* powerpc: Fix Altivec supportSebastian Huber2013-06-261-1/+1
| | | | Use the right context.
* termios: Update due to API changesSebastian Huber2013-06-259-60/+58
| | | | | Termios notifies now the driver about an inactive transmit with the length argument set to zero.
* bsps/powerpc: Delete clock_4xx.cSebastian Huber2013-06-241-225/+0
|
* bsps: Move bsp_generic_fatal_code to new fileSebastian Huber2013-06-211-5/+2
| | | | Add bsp_generic_fatal().
* bsps/powerpc: Delete bsp_exceptions_in_RAMSebastian Huber2013-06-214-68/+77
| | | | | Delete ppc_exc_vector_base. Add and use ppc_exc_initialize_with_vector_base().
* bsps/arm: Set vector base address if necessarySebastian Huber2013-06-201-0/+47
|
* score: Add and use _Thread_Dispatch_is_enabled()Sebastian Huber2013-06-144-4/+4
| | | | | Delete _Thread_Dispatch_in_critical_section() and _Thread_Is_dispatching_enabled().
* smp: Fix PowerPC context switchSebastian Huber2013-06-071-1/+1
|
* bsps/arm: Add SMP supportSebastian Huber2013-05-311-0/+57
|
* smp: Add PowerPC supportSebastian Huber2013-05-311-0/+23
|
* score: Remove idle field of Per_CPU_ControlSebastian Huber2013-05-312-4/+10
| | | | | | This field is unused except for special case simulator clock drivers. In these places use an alternative. Add and use _Thread_Set_global_exit_status() and _Thread_Get_global_exit_status().
* bsps/arm: Use Write-Allocate cache for ARMv7Sebastian Huber2013-05-311-2/+2
|
* bsps/arm: Merge ARMv7 MMU section definitionsSebastian Huber2013-05-311-0/+43
|
* bsps/arm: Remove superfluous parameterSebastian Huber2013-05-061-2/+1
|
* bsps/arm: Support ARMv7 VMSA sections and controlSebastian Huber2013-05-031-4/+29
|
* bsps/arm: Add arm_cp15_set_exception_handler()Sebastian Huber2013-05-031-0/+6
|
* bsps/arm: Add arm_cp15_set_trans*_table_entries()Sebastian Huber2013-05-031-0/+11
|
* bsps/arm: Add arm_cp15_mmu_disable()Sebastian Huber2013-05-031-0/+46
|
* bsps/arm: Add arm_cp15_get_min_cache_line_size()Sebastian Huber2013-05-031-6/+26
|
* bsp/mpc55xx: Avoid empty enumSebastian Huber2013-04-291-0/+2
|
* bsp/mpc55xx: Add MMU tag translate initializerSebastian Huber2013-04-251-3/+6
|
* D-cache clean&&invalidate for Tiny6410Peng Fan2013-04-171-0/+21
|
* bsp/mpc55xx: TypoSebastian Huber2013-04-171-1/+1
|
* bsp/mpc55xx: eDMA API changesSebastian Huber2013-04-084-165/+471
|
* bsp/mpc55xx: Add alternative register layoutSebastian Huber2013-04-081-0/+17
|
* bsp/mpc55xx: Add PCR index enumerationSebastian Huber2013-04-081-2/+266
|
* bsp/mpc55xx: New fatal errorsSebastian Huber2013-04-081-4/+3
|
* bsps: Fix warningsSebastian Huber2013-04-081-1/+1
|
* mpc83xx: Add and use mpc83xx_reset()Sebastian Huber2013-03-141-0/+19
| | | | | The inline version makes it possible to use this code in different memory areas.
* RTEMS: Delete ChangeLog files.Gedare Bloom2013-03-0812-6388/+0
| | | | | | | | | This commit deletes all RTEMS ChangeLog files. These files have been abandoned since converting to git version control. The historical data may be recovered by checking out any commit before this one. Most of the contents of these ChangeLog files can also be found in the git log. Two external ChangeLog files, ChangeLog.slac and ChangeLog.zlib, remain.
* bsp/mpc55xx: Add register type definitionSebastian Huber2013-02-251-1/+1
|
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-20 02:43:05 +0000