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* Replace www.rtems.com with www.rtems.orgSebastian Huber2015-03-202-2/+2
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* rtems: Use atomic operation with correct typeDaniel Cederman2015-03-201-1/+1
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* libcpu/bfin/clock/rtc.c: Do not use rtems_clock_get()Joel Sherrill2015-03-171-2/+2
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* libcpu/powerpc/mpc8260/console-generic/console-generic.c: Include bsp.h to ↵Joel Sherrill2015-03-091-3/+1
| | | | fix warning
* sparc64: fix copyright notices.Gedare Bloom2015-02-232-14/+4
| | | | | The sparc64 port had some incorrect copyright notices affixed to source code files.
* bsps/powerpc: Fix a clock driverNick Withers2015-01-301-9/+57
| | | | | | | PowerPC Book E: Account for an extra tick period if a tick increment's pending. Close #2230.
* bsps/powerpc: Fix switch statement in CPU identSebastian Huber2015-01-231-0/+2
| | | | Close #2237.
* powerpc: Fix AltiVec VSCR save/restoreSebastian Huber2015-01-201-4/+6
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* libcpu/powerpc/mpc6xx/mmu/bat.c: Now compiles with gcc 5.xJoel Sherrill2015-01-131-12/+12
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* powerpc: AltiVec and FPU context supportSebastian Huber2015-01-137-12/+821
| | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
* bsps/powerpc: Use e500 exc categories for e6500Sebastian Huber2015-01-131-0/+1
| | | | This is not correct, but works for now.
* powerpc: Use PPC_HAS_FPUSebastian Huber2015-01-091-6/+6
| | | | Provide floating point context support only if PPC_HAS_FPU == 1.
* powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500Sebastian Huber2015-01-091-15/+11
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* powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZESebastian Huber2015-01-091-8/+2
| | | | | Use it for the default PPC_CACHE_ALIGNMENT. Use it for PPC_STRUCTURE_ALIGNMENT.
* bsps/powerpc: ppc_exc_initialize_interrupt_stack()Sebastian Huber2015-01-092-11/+20
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* bsps/powerpc: Add TMR access macrosSebastian Huber2015-01-091-0/+28
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* bsps/powerpc: Add cache size functionsSebastian Huber2015-01-091-0/+46
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* bsps/powerpc: Delete C pre-processor warningSebastian Huber2015-01-091-2/+0
| | | | Do not warn about not implemented cache functions.
* bsps/powerpc: Support a cache alignment of 64Sebastian Huber2015-01-091-1/+8
| | | | Give the BSP the ability to define PPC_CACHE_ALIGNMENT.
* bsps/powerpc: Support e6500 indentificationSebastian Huber2015-01-092-0/+12
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* bsps/mpc83xx: Fix warningsSebastian Huber2015-01-091-4/+5
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* Use fixed-width C99 types for PowerPC in_be16() and co.Nick Withers2014-12-231-21/+22
| | | | | | Also use the const qualifier on the address pointer's target in in_*() Closes #2128
* bsp/mpc8xx: Fix warningsSebastian Huber2014-12-121-2/+0
| | | | close #2211
* bsp/mpc8xx: Fix warningsSebastian Huber2014-12-123-11/+2
| | | | close #2211
* sparc64: put each copyright on one lineGedare Bloom2014-12-083-10/+6
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* Update bug report URLSebastian Huber2014-12-0512-12/+12
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* beagle bsp: disable watchdog on am335xBen Gras2014-12-051-0/+6
| | | | | | | | | | | | On recent u-boots, the watchdog is turned on / left enabled. The Beaglebone Black rev. C ships with such a u-boot internally so any application booting from it must disable the watchdog. Therefore this change is needed to boot an RTEMS app out-of-the-box on a BBB Rev C - otherwise the user button must be held during boot (to bypass the stock uboot) or the internal uboot must be updated. To allow for a better out-of-the-box experience, we just turn off the watchdog.
* i386: doxygen and comments related to VESA real mode framebufferJan Dolezal2014-12-041-28/+37
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* SPARC: optimize IRQ enable & disableDaniel Hellstrom2014-12-042-55/+65
| | | | | | | | | | | | | | | | * Coding style cleanups. * Use OS reserved trap 0x89 for IRQ Disable * Use OS reserved trap 0x8A for IRQ Enable * Add to SPARC CPU supplement documentation This will result in faster Disable/Enable code since the system trap handler does not need to decode which function the user wants. Besides the IRQ disable/enabled can now be inline which avoids the caller to take into account that o0-o7+g1-g4 registers are destroyed by trap handler. It was also possible to reduce the interrupt trap handler by five instructions due to this.
* SPARC: optimize window underflow trapDaniel Hellstrom2014-12-021-8/+6
| | | | | | | | | | | Save five instructions on underflow handling. By using an optimized trap entry we can move instructions from the window underflow function into the trap entry vector. By setting WIM=0 and using RESTORE it is possible to move the new WIM register content from the trapped window into the to-be-restored register window. It is then possible to avoid the WIM write delay.
* SPARC: optimize window overflow trap entryDaniel Hellstrom2014-12-021-0/+1
| | | | | | | | By using a optimized trap entry we can move instructions from the window overflow function into the trap entry vector. By using the saved locals instead of g1 we don't need to save that register temporarily. Also spead out non store instructions inbetween stores to use the write buffer better.
* SPARC: window overflow optimizationDaniel Hellstrom2014-12-021-16/+9
| | | | | I see no need for waiting the 3 instruction delay for wim to be written in this case, since the STD after does not depend on WIM
* rtems: Move rtems_cache_aligned_malloc()Sebastian Huber2014-11-2512-55/+7
| | | | | | Make sure also the size is cache aligned since otherwise we may have some overlap with the next allocation block. A cache invalidate on this area would be fatal.
* powerpc/haleakala: Add network driverNigel Spon2014-11-212-40/+143
| | | | close 1405
* i386: global descriptor table manipulation functionsJan Dolezal2014-11-201-4/+87
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* i386: GDTR manipulation functions parameters changed to use explicit width typesJan Dolezal2014-11-202-5/+7
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* Add some generic ARM am335x and omap definitionsBen Gras2014-11-033-0/+692
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* libcpu/bfin/clock/tod.h: Delete - missed on previous commitsJoel Sherrill2014-10-311-61/+0
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* bsp/mpc55xxevb: Fix flash settings for MPC5510Sebastian Huber2014-10-311-1/+2
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* libcpu/sh/sh7045/sci/sci.c: Eliminate use of obsolete methodJoel Sherrill2014-10-201-23/+9
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* libcpu/arm/pxa255/ffuart/ffuart.c: Fix warningJoel Sherrill2014-10-201-1/+1
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* libcpu/arm/at91rm9200/dbgu/dbgu.c: Fix warningJoel Sherrill2014-10-201-2/+2
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* libcpu/powerpc configure logic: Do not built e500 components unused by qoriqJoel Sherrill2014-10-193-6/+17
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* mcf5206 libcpu and mcf5206elite: Fix warningsJoel Sherrill2014-10-194-801/+705
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* libcpu/powerpc/ppc403/console/console405.c: Fix warningsJoel Sherrill2014-10-161-18/+6
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* libcpu/powerpc/mpc8xx/console-generic/console-generic.c: Fix warningsJoel Sherrill2014-10-161-6/+6
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* libcpu/powerpc/mpc6xx: Fix warningsJoel Sherrill2014-10-162-34/+12
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* libcpu/powerpc/mpc55xx/misc/flash_support.c: Fix warningsJoel Sherrill2014-10-161-1/+4
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* libcpu/powerpc/e500/mmu/mmu.c: Fix warningsJoel Sherrill2014-10-161-331/+331
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* SH libcpu and libbsp: Fix warningsJoel Sherrill2014-10-165-61/+51
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