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2018-03-13sparc64: Move libcpu content to cpukitSebastian Huber6-1007/+0
This patch is a part of the BSP source reorganization. Update #3285.
2018-01-31bsps: Rework cache manager implementationSebastian Huber3-70/+0
The previous cache manager support used a single souce file (cache_manager.c) which included an implementation header (cache_.h). This required the use of specialized include paths to find the right header file. Change this to include a generic implementation header (cacheimpl.h) in specialized source files. Use the following directories and files: * bsps/shared/cache * bsps/@RTEMS_CPU@/shared/cache * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c Update #3285.
2018-01-25Remove make preinstallChris Johns3-8/+2
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
2017-12-08bsps: Do not install <libcpu/cache.h>Sebastian Huber3-22/+1
This is a cache manager implementation header file. Update #3254.
2016-11-18sparc64: Rename CPU_Minimum_stack_frameSebastian Huber1-1/+1
Rename SPARC64-specific CPU_Minimum_stack_frame to SPARC64_Minimum_stack_frame. Rename SPARC64-specific CPU_MINIMUM_STACK_FRAME_SIZE to SPARC64_MINIMUM_STACK_FRAME_SIZE. Update #2809.
2015-02-23sparc64: fix copyright notices.Gedare Bloom2-14/+4
The sparc64 port had some incorrect copyright notices affixed to source code files.
2014-12-08sparc64: put each copyright on one lineGedare Bloom3-10/+6
2014-12-05Update bug report URLSebastian Huber1-1/+1
2014-11-25rtems: Move rtems_cache_aligned_malloc()Sebastian Huber1-1/+1
Make sure also the size is cache aligned since otherwise we may have some overlap with the next allocation block. A cache invalidate on this area would be fatal.
2014-10-13sparc64: remove sparc64_install_isr_entries and its callers.Gedare Bloom3-27/+0
sparc64_install_isr_entries function is no longer used. Removing it also allows to use the default bsppredriverhook for usiii and bspstart for niagara.
2014-10-09Eliminate use of /*PAGE and clean up formattingJoel Sherrill1-10/+6
2014-08-29Regenerate all preinstall.am files.Chris Johns1-3/+3
With this patch the preinstall.am files are in a set order and not dependent on now perl implements a hash.
2014-08-28Regenerate all preinstall.am files.Joel Sherrill1-3/+3
Apparently, at some point automake output changed and these were not updated.
2014-04-29score: Statically initialize _ISR_Vector_tableSebastian Huber1-1/+0
2014-03-21Change all references of rtems.com to rtems.org.Chris Johns3-3/+3
2013-08-09score: Per-CPU thread dispatch disable levelSebastian Huber1-2/+2
Use a per-CPU thread dispatch disable level. So instead of one global thread dispatch disable level we have now one instance per processor. This is a major performance improvement for SMP. On non-SMP configurations this may simplifiy the interrupt entry/exit code. The giant lock is still present, but it is now decoupled from the thread dispatching in _Thread_Dispatch(), _Thread_Handler(), _Thread_Restart_self() and the interrupt entry/exit. Access to the giant lock is now available via _Giant_Acquire() and _Giant_Release(). The giant lock is still implicitly acquired via _Thread_Dispatch_decrement_disable_level(). The giant lock is only acquired for high-level operations in interrupt handlers (e.g. release of a semaphore, sending of an event). As a side-effect this change fixes the lost thread dispatch necessary indication bug in _Thread_Dispatch(). A per-CPU thread dispatch disable level greatly simplifies the SMP support for the interrupt entry/exit code since no spin locks have to be acquired in this area. It is only necessary to get the current processor index and use this to calculate the address of the own per-CPU control. This reduces the interrupt latency considerably. All elements for the interrupt entry/exit code are now part of the Per_CPU_Control structure: thread dispatch disable level, ISR nest level and thread dispatch necessary. Nothing else is required (except CPU port specific stuff like on SPARC).
2013-03-08RTEMS: Delete ChangeLog files.Gedare Bloom1-97/+0
This commit deletes all RTEMS ChangeLog files. These files have been abandoned since converting to git version control. The historical data may be recovered by checking out any commit before this one. Most of the contents of these ChangeLog files can also be found in the git log. Two external ChangeLog files, ChangeLog.slac and ChangeLog.zlib, remain.
2012-07-19Require automake-1.12.2.Ralf Corsépius1-1/+1
2012-07-19Require autoconf-2.69.Ralf Corsépius1-1/+1
2012-05-11Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill5-9/+0
Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
2012-05-04Remove CVS-Ids.Ralf Corsépius2-6/+0
2012-03-14PR2041: sparc64: vector number not included in CPU_Interrupt_frameGedare Bloom1-2/+2
Add the trap vector to the interrupt frame. Also rename the assembly macro that accesses the field to be consistent with similar macros.
2012-02-01Remove all .cvsignore files.Joel Sherrill1-8/+0
2011-11-062011-11-06 Gedare Bloom <gedare@rtems.org>Gedare Bloom1-1/+5
* ChangeLog: Fix ChangeLog with name and email address
2011-11-062011-11-06 gedare@rtems.orgGedare Bloom2-0/+5
* shared/score/interrupt.S: Pass ISR correct pointer to interrupt frame
2011-02-112011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2-1/+6
* shared/cache/cache.c: Use "__asm__" instead of "asm" for improved c99-compliance.
2011-02-022011-02-02 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2-2/+6
* configure.ac: Require autoconf-2.68, automake-1.11.1.
2010-08-252010-08-25 Gedare Bloom <giddyup44@yahoo.com>Joel Sherrill2-6/+14
PR 1688/libcpu * shared/score/interrupt.S: Fix bug in the sun4u _ISR_Dispatch code that ends up cloberring the global registers. It manifests primarily as a memory alignment error when the globals are used to read to/from memory.
2010-08-202010-08-20 Gedare Bloom <giddyup44@yahoo.com>Joel Sherrill2-1/+10
PR 1681/cpukit * shared/score/interrupt.S: With the percpu patch, ASM uses INTERRUPT_STACK_HIGH instead of _CPU_Interrupt_stack_high. The sparc64 was still using the old variable, which was declared in its cpu.h file. This patch to comment out the declaration and switch to using INTERRUPT_STACK_HIGH.
2010-06-292010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2-35/+13
PR 1573/cpukit * shared/score/interrupt.S: Add a per cpu data structure which contains the information required by RTEMS for each CPU core. This encapsulates information such as thread executing, heir, idle and dispatch needed.
2010-06-172010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill12-0/+1257
* .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am, shared/cache/cache.c, shared/cache/cache_.h, shared/interrupts/installisrentries.c, shared/score/cpu.c, shared/score/interrupt.S, shared/syscall/sparc64-syscall.S, shared/syscall/sparc64-syscall.h: New files.
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