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2017-05-29Add support for IBM PowerPC 750 chip.Phong Pham3-0/+6
Closes #3015.
2017-04-24powerpc/new-exceptions/bspsupport/ppc_exc_print.c: Fix printf() format warningsJoel Sherrill1-2/+2
2017-04-24powerpc/mpc5xx/console-generic/console-generic.c: Use updated struct termios ↵Joel Sherrill1-2/+2
format
2017-04-07libcpu/../mpc5xx/.../vectors_init.c: Using inttype macros fixes 39 format ↵Cillian O'Donnell1-39/+41
warnings
2017-03-22termios: Synchronize with latest FreeBSD headersKevin Kirspel7-9/+9
Adding modified FreeBSD headers to synchronize RTEMS termios with FreeBSD. Modify termios to support dedicated input and output baud for termios structure. Updated BSPs to use dedicated input and output baud in termios structure. Updated tools to use dedicated input and output baud in termios structure. Updated termios testsuites to use dedicated input and output baud in termios structure. Close #2897.
2017-03-07powerpc: Optimize AltiVec context switchSebastian Huber2-31/+30
Use r8 instead of r5 to slightly optimize _CPU_Context_switch(). It is not a big deal, however, we already assume r12 is used by _CPU_Context_switch(). Treat r5 the in same way.
2017-03-07powerpc: Fix AltiVec context switchSebastian Huber1-12/+12
Update #2751.
2017-03-02powerpc: Fix warningsSebastian Huber1-1/+1
2017-03-02powerpc: Fix interrupt thread dispatchSebastian Huber1-2/+1
Update #2751.
2017-02-15bsps/powerpc: Fix warningSebastian Huber1-2/+0
2017-02-15bsps/powerpc: Fix warningsSebastian Huber4-58/+61
2016-12-02score: Fix ARM and PowerPC context initializationSebastian Huber1-0/+1
Update #2751.
2016-11-24score: Fix interrupt profilingSebastian Huber1-20/+13
Callers of _Thread_Do_dispatch() must have a valid Per_CPU_Control::Stats::thread_dispatch_disabled_instant. Call _Profiling_Outer_most_interrupt_entry_and_exit() with the interrupt stack to not exceed Per_CPU_Control::Interrupt_frame. Update #2751.
2016-11-24powerpc: Fix interrupt profiling for e6500Sebastian Huber1-1/+3
2016-11-21powerpc/mpc5xx: Rename CPU_Interrupt_frameSebastian Huber2-4/+4
The MPC5XX support uses a legacy interrupt/exception infrastructure. Close #2819.
2016-11-18powerpc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2-20/+66
Update #2751.
2016-11-18score: Allow interrupts during thread dispatchSebastian Huber1-12/+17
Use a processor-specific interrupt frame during context switches in case the executing thread is longer executes on the processor and the heir thread is about to start execution. During this period we must not use a thread stack for interrupt processing. Update #2809.
2016-11-18powerpc: Add up to date CPU_Interrupt_frameSebastian Huber3-379/+4
Rename ppc_exc_min_frame to CPU_Interrupt_frame. Move it and the corresponding defines to <rtems/score/cpuimpl.h>. Update #2809.
2016-11-18powerpc: Move legacy CPU_Interrupt_frameSebastian Huber1-0/+33
The only remaining user of CPU_Interrupt_frame on PowerPC is the mpc5xx support. Move it to here. Update #2809.
2016-11-18bsps/powerpc: Avoid use of CPU_Interrupt_frameSebastian Huber1-3/+3
This type is not relevant for the code since only a pointer is passed around. Update #2809.
2016-11-10powerpc: Add _CPU_Get_current_per_CPU_control()Sebastian Huber1-1/+8
Add _CPU_Get_current_per_CPU_control() on SMP configurations. Use SPRG0 for the current per-CPU control. This reduces the code size by three instructions and is slightly faster. Update #2805.
2016-11-09score: Add and use Thread_Control::is_idleSebastian Huber1-5/+1
Update #2797.
2016-09-08powerpc: Fix SMP context switchSebastian Huber1-61/+62
We need the unmodified r4 for get_potential_new_heir. This partially reverts commit 8d785f72d9610fb80a65d7848404f0f7507e026c.
2016-07-19bsps/powerpc: Fix AtliVec context switchSebastian Huber2-62/+68
Properly pass the stack aligned context to _CPU_Context_switch_altivec() since _CPU_altivec_ctxt_off defined via ppc_context. Close #2761.
2016-05-20score: Rename _ISR_Disable() and _ISR_Enable()Sebastian Huber2-4/+4
Rename _ISR_Disable() into _ISR_Local_disable(). Rename _ISR_Enable() into _ISR_Local_enable(). Remove _Debug_Is_owner_of_giant(). This is a preparation to remove the Giant lock. Update #2555.
2016-05-20score: Rename _ISR_Disable_without_giant()Sebastian Huber1-12/+12
Rename _ISR_Disable_without_giant() into _ISR_Local_disable(). Rename _ISR_Enable_without_giant() into _ISR_Local_enable(). This is a preparation to remove the Giant lock. Update #2555.
2016-02-03Delete unused API extensionsSebastian Huber3-3/+0
2016-01-11score: Introduce Thread_Entry_informationSebastian Huber1-2/+2
This avoids potential dead code in _Thread_Handler(). It gets rid of the dangerous function pointer casts. Update #2514.
2015-11-12Fix interrupt epilogue for ARMv7-AR and PowerPCSebastian Huber1-13/+38
2015-09-28SMP: Fix and optimize thread dispatchingSebastian Huber2-15/+19
According to the C11 and C++11 memory models only a read-modify-write operation guarantees that we read the last value written in modification order. Avoid the sequential consistent thread fence and instead use the inter-processor interrupt to set the thread dispatch necessary indicator.
2015-07-17bsp/mpc83xx: Update due to header guard changeSebastian Huber2-6/+6
Close #2373.
2015-07-08bsps/powerpc: Provide debug and trace symbolsSebastian Huber1-0/+3
2015-06-26score: Simplify <rtems/system.h>Sebastian Huber2-0/+2
Drop the <rtems/score/percpu.h> include since this file exposes a lot of implementation details.
2015-06-09score: Add Thread_Control::is_fpSebastian Huber1-17/+1
Store the floating-point unit property in the thread control block regardless of the CPU_HARDWARE_FP and CPU_SOFTWARE_FP settings. Make sure the floating-point unit is only enabled for the corresponding multilibs. This helps targets which have a volatile only floating point context like SPARC for example.
2015-05-29bsps/powerpc: Fix potential integer overflowSebastian Huber1-1/+1
Update #2356.
2015-05-20bsps: Convert clock drivers to use a timecounterAlexander Krutwig1-78/+29
Update #2271.
2015-03-09libcpu/powerpc/mpc8260/console-generic/console-generic.c: Include bsp.h to ↵Joel Sherrill1-3/+1
fix warning
2015-01-30bsps/powerpc: Fix a clock driverNick Withers1-9/+57
PowerPC Book E: Account for an extra tick period if a tick increment's pending. Close #2230.
2015-01-23bsps/powerpc: Fix switch statement in CPU identSebastian Huber1-0/+2
Close #2237.
2015-01-20powerpc: Fix AltiVec VSCR save/restoreSebastian Huber1-4/+6
2015-01-13libcpu/powerpc/mpc6xx/mmu/bat.c: Now compiles with gcc 5.xJoel Sherrill1-12/+12
2015-01-13powerpc: AltiVec and FPU context supportSebastian Huber7-12/+821
Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
2015-01-13bsps/powerpc: Use e500 exc categories for e6500Sebastian Huber1-0/+1
This is not correct, but works for now.
2015-01-09powerpc: Use PPC_HAS_FPUSebastian Huber1-6/+6
Provide floating point context support only if PPC_HAS_FPU == 1.
2015-01-09powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500Sebastian Huber1-15/+11
2015-01-09powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZESebastian Huber1-8/+2
Use it for the default PPC_CACHE_ALIGNMENT. Use it for PPC_STRUCTURE_ALIGNMENT.
2015-01-09bsps/powerpc: ppc_exc_initialize_interrupt_stack()Sebastian Huber2-11/+20
2015-01-09bsps/powerpc: Add TMR access macrosSebastian Huber1-0/+28
2015-01-09bsps/powerpc: Add cache size functionsSebastian Huber1-0/+46
2015-01-09bsps/powerpc: Delete C pre-processor warningSebastian Huber1-2/+0
Do not warn about not implemented cache functions.
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