| Commit message (Collapse) | Author | Age | Files | Lines |
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Use _PPC_INTERRUPT_DISABLE_MASK introduced with
801b5d80325dbd3e92218271d54e75f389da7136.
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This partially reverts commit 1215fd4d9426a59d568560e9a485628560363133.
In order to support profiling of SMP locks and provide a future
compatible SMP locks API it is necessary to add an SMP lock destroy
function. Since the commit above adds an SMP lock to each chain control
we would have to add a rtems_chain_destroy() function as well. This
complicates the chain usage dramatically. Thus revert the patch above.
A global SMP lock for all chains is used to implement the protected
chain operations.
Advantages:
* The SAPI chain API is now identical on SMP and non-SMP
configurations.
* The size of the chain control is reduced and is then equal to the
Score chains.
* The protected chain operations work correctly on SMP.
Disadvantage:
* Applications using many different chains and the protected operations
may notice lock contention.
The chain control size drop is a huge benefit (SAPI chain controls are
66% larger than the Score chain controls). The only disadvantage is not
really a problem since these applications can use specific interrupt
locks and unprotected chain operations to avoid this issue.
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A cache line cannot have a negative size.
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Merge RTEMS_FATAL_SOURCE_BSP_GENERIC and RTEMS_FATAL_SOURCE_BSP_SPECIFIC
into new fatal source RTEMS_FATAL_SOURCE_BSP. This makes it easier to
figure out the code position given a fatal source and code.
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Instead of SPRG0 (= special purpose register 272) use the new global
symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask.
The benefit is that it is now possible to disable interrupts without
further run-time initialization in boot_card().
At least on Freescale e500 cores this leads also to a faster execution
since the mfmsr and mfspr instruction require four cycles to complete.
The instructions to load the mask value can execute while the mfmsr is
in progress.
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Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
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The r2 may be used for thread-local storage.
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Add ISR lock to chain control for proper SMP protection. Replace
rtems_chain_extract() with rtems_chain_explicit_extract() and
rtems_chain_insert() with rtems_chain_explicit_insert() on SMP
configurations. Use rtems_chain_explicit_extract() and
rtems_chain_explicit_insert() to provide SMP support.
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Interrupt support for per-CPU thread dispatch disable level.
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Use the right context.
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Termios notifies now the driver about an inactive transmit with the
length argument set to zero.
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Add bsp_generic_fatal().
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Delete ppc_exc_vector_base. Add and use
ppc_exc_initialize_with_vector_base().
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This field is unused except for special case simulator clock drivers.
In these places use an alternative. Add and use
_Thread_Set_global_exit_status() and _Thread_Get_global_exit_status().
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The inline version makes it possible to use this code in different
memory areas.
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This commit deletes all RTEMS ChangeLog files. These files have been abandoned
since converting to git version control. The historical data may be recovered
by checking out any commit before this one. Most of the contents of these
ChangeLog files can also be found in the git log.
Two external ChangeLog files, ChangeLog.slac and ChangeLog.zlib, remain.
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Use mpc55xx_wait_for_interrupt().
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In combination with the PPC_EXC_CONFIG_USE_FIXED_HANDLER option this
removes all dependencies on valid read-write data. The exception
handling must be statically configured and all components reside in
read-only sections.
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In case a BSP enables this option, then fixed high level exception
handler will be used. For normal asynchronous exceptions this is
bsp_interrupt_dispatch() and for other exceptions this is the handler
from the read-only ppc_exc_handler_table. The global handler is
C_exception_handler(). This avoids some dependencies on valid
read-write data.
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