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2018-03-19bsps/powerpc: Move exceptions support to bspsSebastian Huber1-471/+0
This patch is a part of the BSP source reorganization. Update #3285.
2017-11-20bsps/powerpc: Fix PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber1-0/+7
For the SPE support we must store the upper half of r3 as well. Update #3085.
2017-09-20bsps/powerpc: Fix PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber1-0/+4
Fix link-time error on BSPs not using PPC_EXC_CONFIG_USE_FIXED_HANDLER. Update #3085.
2017-09-19bsps/powerpc: PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber1-148/+104
Make PPC_EXC_CONFIG_USE_FIXED_HANDLER mandatory for BSPs using ppc_exc_interrupt(). Pass exception number to bsp_interrupt_dispatch() to allow processing of decrementer and doorbell exceptions as hypervisor guest. Update #3085.
2017-08-22powerpc: PPC64_NOP_FOR_LINKER_TOC_POINTER_RESTORESebastian Huber1-0/+3
In 64-bit mode, the linker must have the ability to restore the TOC pointer after an external function call. Update #3082.
2017-08-22bsps/powerpc: Rename ppc_exc_wrap_async_normal_endSebastian Huber1-1/+1
Rename ppc_exc_wrap_async_normal_end to ppc_exc_interrupt_end to avoid a bit of obfuscation. Update #3082.
2017-08-22powerpc: Add 64-bit context/interrupt supportSebastian Huber1-42/+32
Update #3082.
2017-08-01bsps/powerpc: Add PPC_EXC_INTERRUPT_FRAME_SIZESebastian Huber1-2/+2
Use a specific define for the interrupt exception frame size. Update #3082.
2017-08-01bsps/powerpc: Rename ppc_exc_wrap_async_normalSebastian Huber1-3/+3
Rename ppc_exc_wrap_async_normal to ppc_exc_interrupt to avoid a bit of obfuscation. Update #3082.
2017-03-02powerpc: Fix interrupt thread dispatchSebastian Huber1-2/+1
Update #2751.
2016-11-24score: Fix interrupt profilingSebastian Huber1-20/+13
Callers of _Thread_Do_dispatch() must have a valid Per_CPU_Control::Stats::thread_dispatch_disabled_instant. Call _Profiling_Outer_most_interrupt_entry_and_exit() with the interrupt stack to not exceed Per_CPU_Control::Interrupt_frame. Update #2751.
2016-11-24powerpc: Fix interrupt profiling for e6500Sebastian Huber1-1/+3
2016-11-18powerpc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber1-19/+59
Update #2751.
2016-11-18powerpc: Add up to date CPU_Interrupt_frameSebastian Huber1-3/+3
Rename ppc_exc_min_frame to CPU_Interrupt_frame. Move it and the corresponding defines to <rtems/score/cpuimpl.h>. Update #2809.
2015-11-12Fix interrupt epilogue for ARMv7-AR and PowerPCSebastian Huber1-13/+38
2015-07-08bsps/powerpc: Provide debug and trace symbolsSebastian Huber1-0/+3
2015-01-13powerpc: AltiVec and FPU context supportSebastian Huber1-1/+148
Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
2014-03-21Change all references of rtems.com to rtems.org.Chris Johns1-1/+1
2014-03-14bsps/powerpc: Add support for interrupt profilingSebastian Huber1-2/+51
2013-08-09bsps/powerpc: Per-CPU thread dispatch disableSebastian Huber1-37/+14
Interrupt support for per-CPU thread dispatch disable level.
2013-05-31smp: Add PowerPC supportSebastian Huber1-0/+23
2012-12-03bsps/powerpc: Add PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber1-1/+20
In case a BSP enables this option, then fixed high level exception handler will be used. For normal asynchronous exceptions this is bsp_interrupt_dispatch() and for other exceptions this is the handler from the read-only ppc_exc_handler_table. The global handler is C_exception_handler(). This avoids some dependencies on valid read-write data.
2012-06-04powerpc: Simplify context switchSebastian Huber1-21/+21
PowerPC cores with the SPE (Signal Processing Extension) have 64-bit general-purpose registers. The SPE context switch code has been merged with the standard context switch code. The context switch may use cache operations to increase the performance. It will be ensured that the context is 32-byte aligned (PPC_DEFAULT_CACHE_LINE_SIZE). This increases the overall memory size of the context area in the thread control block slightly. The general-purpose registers GPR2 and GPR13 are no longer part of the context. The BSP must initialize these registers during startup (usually initialized by the __eabi() function). The new BSP option BSP_USE_DATA_CACHE_BLOCK_TOUCH can be used to enable the dcbt instruction in the context switch. The new BSP option BSP_USE_SYNC_IN_CONTEXT_SWITCH can be used to enable sync and isync instructions in the context switch. This should be not necessary in most cases.
2012-05-11Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill1-2/+0
Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
2011-11-082011-11-08 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber1-0/+1
* new-exceptions/bspsupport/ppc_exc_async_normal.S: Bugfix for MPC5674F. Use it for all to be safe. * mpc55xx/include/emios.h: Fixed eMIOS module count. * mpc55xx/include/irq.h: Fixed CAN vector numbers. BSP_INTERRUPT_HANDLER_TABLE_SIZE is now a BSP option.
2011-07-212011-07-21 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber1-0/+235
PR 1799/bsps * new-exceptions/bspsupport/ppc_exc_async_normal.S: New file. * new-exceptions/cpu.c, new-exceptions/cpu_asm.S, new-exceptions/bspsupport/ppc_exc_asm_macros.h, new-exceptions/bspsupport/ppc_exc_global_handler.c, new-exceptions/bspsupport/ppc_exc_prologue.c, new-exceptions/bspsupport/vectors.h: Added support for SPE. * configure.ac, preinstall.am, Makefile.am: Added support for qoriq BSPs.
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