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* mpc6xx/exceptions/raw_exception.c, pc6xx/mmu/pte121.c: Modified
slightly to reflect recent PowerPC re-organization and avoid warnings.
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* rtems/powerpc/registers.h, rtems/score/ppc.h: Per PR213, add
the following:
- support for the MPC74000 (AKA G4); there is no
AltiVec support yet, however.
- the cache flushing assembly code uses hardware-flush on the G4.
Also, a couple of hardcoded numerical values were replaced
by more readable symbolic constants.
- extended interrupt-disabled code section so enclose the entire
cache flush/invalidate procedure (as recommended by the book).
This is not (latency) critical as it is only used by
init code but prevents possible corruption.
- Trivial page table support as been added.
(1:1 effective-virtual-physical address mapping which is only
useful only on CPUs which feature hardware TLB replacement,
e.g. >604. This allows for write-protecting memory regions,
e.g. text/ro-data which makes catching corruptors a lot easier.
It also frees one DBAT/IBAT and gives more flexibility
for setting up address maps :-)
- setdbat() allows changing BAT0 also (since the BSP may use
a page table, BAT0 could be available...).
- asm_setdbatX() violated the SVR ABI by using
r20 as a scratch register; changed for r0
- according to the book, a context synchronizing instruction is
necessary prior to and after changing a DBAT -> isync added
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* shared/include/cpu.h: Removed.
* shared/include/Makefile.am: Reflect changes above.
* shared/include/spr.h: Include rtems/powerpc/registers.h instead of
libcpu/cpu.h.
* mpc6xx/clock/c_clock.c: Reflect changes to <rtems/score/cpu.h>.
* mpc6xx/exceptions/asm_utils.S: Ditto.
* mpc6xx/exceptions/raw_exception.c: Ditto.
* mpc6xx/mmu/mmuAsm.S: Ditto.
* mpc6xx/timer/timer.c: Ditto.
* mpc8260/exceptions/asm_utils.S: Ditto.
* mpc8260/exceptions/raw_exception.c: Ditto.
* mpc8xx/exceptions/asm_utils.S: Ditto.
* mpc8xx/exceptions/raw_exception.c: Ditto.
* ppc403/vectors/vectors.S: Include <asm.h> instead of "asm.h".
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* exceptions/raw_exception.c: Include <libcpu/cpuIdent.h>.
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<valette@crf.canon.fr> and Jay Kulpinski <jskulpin@eng01.gdds.com>.
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As part of this effort, the mpc750 libcpu code is now shared with the
ppc6xx.
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