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* Patch from Eric Valette <valette@crf.canon.fr>:Joel Sherrill1998-08-211-2/+1
| | | | | | | | | | Here is a patch that enables to catch exception and get message before crashing RTEMS :) It should be generic to any Intel port although enabled only for pc386 BSP... [Joel] I fixed the bug I introduced in irq_asm.s...
* Patch from Eric Valette <valette@crf.canon.fr> which brings the i386ex BSPJoel Sherrill1998-08-054-9/+25
| | | | inline with the new IRQ structure.
* Automatic CPU type detection code from Eric Valette <valette@crf.canon.fr>.Joel Sherrill1998-08-056-6/+664
| | | | Enabled on the pc386.
* Patch from Eric VALETTE <valette@crf.canon.fr>:Joel Sherrill1998-07-236-0/+1126
Here is a enhanced version of my previous patch. This patch enables to potentially share the new interrupt management code for all Intel targets (pc386, go32 and force386) bsp. Note : this patch is complete only for pc386. It still needs to be completed for go32 and force386. I carrefully checked that anything needed is in for force386 (only some function name changes for IDT manipulation and GDT segment manipulation). But anyway I will not be able to test any of theses targets...