| Commit message (Collapse) | Author | Age | Files | Lines |
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This prevents a compile-time error in libtests/i2c01.
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This enables usage of the full real address space which is 40-bit on the
T2080 for example.
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The current support for the Edison supports a single polled
UART for input and output plus a simulated clock tick. The
activities forward for supporting the Edison have been posted
on the RTEMS mailing lists and at:
http://rtemsramblings.blogspot.com/2014/12/intel-edison-and-rtems-road-forward.html
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This allows the BSP to define an optional spin delay which is
useful for making time appear to pass at a rate closer to
wall time. On the Edison, this was used with a polled console
driver to slow polling to a reasonable rate and make time
pass reasonably close to correctly even with no clock tick
support.
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This allows the support for the legacy COM1-COM4 serial ports
to be completely disabled. It is needed to prevent hangs on some
hardware. In particular, the Intel Edison where it is not present.
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This allows the IDE support to be completely disabled. It is needed to
prevent hangs on some hardware. In particular, the Intel Edison where
it is not present.
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This allows the VGA and keyboard console to be completely disabled.
It is useful on PCs without displays and prevents a very slow boot
time on the Intel Edison.
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Also use the const qualifier on the address pointer's target in in_*()
Closes #2128
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The current algorithm scans all PCI busses (0..ff)
and all devices (0..31) on each bus for bridges
and determines the maximum of all subordinate
busses encountered.
However, the algorithm does not scan all functions
present in multi-function devices -- I have a PCI express
root complex (82801H) where multiple (non-zero index)
functions are 'PCI bridges' whose subordinate bus number is
missed by the original algorithm.
This commit makes sure that the scan
is extended to all functions of multi-function
devices.
See #2067
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Close #2220.
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The extra includes in console_*.c are to solve a 'no previous prototype'
warning.
Solves #2212 in trac.
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Fixes bug introduced with f0c564c5ae36da20b1543ae9db9e8fe9644a81c8.
close #2218
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close #2211
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close #2211
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Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
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The dummy.c was a de-facto default configuration. Rename it to
default-configuration.c. Use unlimited objects and the stack checker.
This makes it easier for new RTEMS users which will likely use this file
if they just work with the usual main() function as the application
entry point. Provide proper arguments for main() using the BSP command
line. Add spare user extensions and drivers.
Do not initialize the network by default. Delete bspinit.c.
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On recent u-boots, the watchdog is turned on / left enabled. The
Beaglebone Black rev. C ships with such a u-boot internally so any
application booting from it must disable the watchdog.
Therefore this change is needed to boot an RTEMS app out-of-the-box
on a BBB Rev C - otherwise the user button must be held during boot
(to bypass the stock uboot) or the internal uboot must be updated. To
allow for a better out-of-the-box experience, we just turn off the
watchdog.
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structs, break >80 chars lines, removed newlines at EOFs
fb_vesa_rm.c: removed inline from functions declared in fb_vesa.h
removed unnecessary printks in the end of patch
edid.h, vbe3.h: switched from custom *PACKED_ATTRIBUTE at the structs to the
RTEMS_COMPILER_PACKED_ATTRIBUTE for easier maintainability
of doxygen
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Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
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* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.
It was also possible to reduce the interrupt trap handler by
five instructions due to this.
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If USE_VBE_RM is 0, vesa_realmode_bootup_init() is not available so the
test should be #if instead of #ifdef.
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Previously, bankValidate() could be called (e.g., BSP_flashWrite() -> regionCheckAndErase() -> argcheck() -> bankValidate()) without the probe having happened. When it then invoked BSP_flashCheckId(), unmapped memory could be read, possibly causing a fatal exception.
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Condition needs to be inverted, as a 1 in the mask register means
that the interrupt is enabled. Solves ticket #1959 in trac.
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Condition needs to be inverted, as a 1 in the mask register means
that the interrupt is enabled. Solves ticket #1958 in trac.
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Save five instructions on underflow handling.
By using an optimized trap entry we can move instructions from
the window underflow function into the trap entry vector. By
setting WIM=0 and using RESTORE it is possible to move the
new WIM register content from the trapped window into the
to-be-restored register window. It is then possible to avoid
the WIM write delay.
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I see no need for waiting the 3 instruction delay for wim to be
written in this case, since the STD after does not depend on WIM
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Move the vector table copy out of the Init5235 source to avoid
stipping the GCC bug.
Fixes #2204.
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close #2062
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This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
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This option is necessary to use the latest GCC 4.8, 4.9 and 5.0
versions.
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close #2113
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