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* bsp/altera-cyclone-v: Add socal from hwlib.Christian Mauderer2014-08-112-2/+60
| | | | Some of the headers from the hwlib need the files from the socal subdirectory.
* m68k/gen68360/include/tm27.h: Correct commentJoel Sherrill2014-07-161-2/+1
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* Add More Testsuite Configuration Files and Update Existing OnesJoel Sherrill2014-07-1616-0/+97
| | | | | | | The first pass at building these was without networking enabled. This pass addresses that plus accounts for some new BSPs which needed testsuite.tcfg files and BSPs which could not link tests which had been added since the first pass.
* Common ARM A8 code.Chris Johns2014-07-161-0/+55
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* uart-output-char.h: extra offset definition.Ben Gras2014-07-151-0/+2
| | | | | | | All, This patch is submitted as its values are used in my to-be-submitted beagle bsp.
* bsps/sparc: Set best baud in APBUART driverSebastian Huber2014-07-091-0/+14
| | | | | This prevents failures of all tests using rtems_shell_wait_for_input(), e.g. capture, termios, pppd, etc.
* bsps/sparc: Move APBUART printk supportChristian Mauderer2014-07-094-70/+70
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* bsps/sparc: Add and use shared APBUART consoleSebastian Huber2014-07-095-325/+315
| | | | | | Move the APBUART console driver support to the shared SPARC area so that it can be reused by other BSPs. Only the console driver initialization is now BSP specific.
* bsps: Basic console driver for Termios devicesSebastian Huber2014-07-091-0/+73
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* score: PR2183: Fix context switch on SMPSebastian Huber2014-07-041-8/+49
| | | | | | | | Fix context switch on SMP for ARM, PowerPC and SPARC. Atomically test and set the is executing indicator of the heir context to ensure that at most one processor uses the heir context. Break the busy wait loop also due to heir updates.
* bsp/altera-cyclone-v: Move MMU configuration tableSebastian Huber2014-07-013-20/+37
| | | | This makes it possible to use application specific version.
* bsps/arm: Rename bsp_mm_config_tableSebastian Huber2014-07-013-11/+9
| | | | | | Rename bsp_mm_config_table to arm_cp15_start_mmu_config_table and rename bsp_mm_config_table_size to arm_cp15_start_mmu_config_table_size to be in line with the other names in <bsp/arm-cp15-start.h>.
* bsps/sparc: Reduce copy and pasteSebastian Huber2014-07-015-58/+28
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* LEON3: devfs free nodes must be sizedDaniel Hellstrom2014-06-301-0/+3
| | | | | | | | | .. according to the maximum number of termios ports which is 8. Since LEON3 uses PnP to find how many UARTs there are present we must make sure worst case work. The current maximum of 4 free nodes caused for example the GR712RC with its 6 UARTs to fail during devfs02 test.
* LEON3: fix console close handlingDaniel Hellstrom2014-06-301-3/+3
| | | | | | On SMP rtems_interrupt_lock_context must be used. Most tests fail with a NULL pointer exception when exiting, except on NGMP where main memory is at 0x00000000.
* bsp/realview-pbx-a9: Fix SMP startupSebastian Huber2014-06-121-0/+14
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* lm3s6965-testsuite.cfg: Add pppd.Martin Galvan2014-06-101-0/+1
| | | | | | When trying to compile RTEMS for the Stellaris LM3S6965 board, I had an issue of pppd.exe's .rodata section being too big to fit in the board's memory image (region 'ROM_INT' overflowed).
* bsp/lpc176x: New BSPMartin Boretto2014-06-1042-0/+6504
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* bsps/arm: Fix Cortex-A9 MPCore clock driverSebastian Huber2014-06-061-9/+18
| | | | | | The nanoseconds extension returned wrong values on secondary processors since some of the global timer registeres are banked. Use global variables instead.
* bsp/altera-cyclone-v: Enable unified L2 cacheSebastian Huber2014-06-062-1/+12
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* bsp/altera-cyclone-v: Move SMP supportSebastian Huber2014-06-063-54/+94
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* bsps/arm: Change L2 cache initializationSebastian Huber2014-06-062-50/+1
| | | | | Do not touch the L1 caches since they have been initialized by the start hooks.
* bsp/altera-cyclone-v: Simplify start hooksSebastian Huber2014-06-061-120/+25
| | | | Use arm_a9mpcore_start_hook_0(). The L2 cache is now disabled.
* bsp/altera-cyclone-v: Change default baudSebastian Huber2014-06-061-1/+1
| | | | Use value for standard U-Boot.
* bsp/altera-cyclone-v: Use NOLOAD for nocache secSebastian Huber2014-06-061-1/+1
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* bsp/altera-cyclone-v: Simplify MMU config tableSebastian Huber2014-06-061-2/+1
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* bsps/arm: Define ARM_CP15_TEXT_SECTIONSebastian Huber2014-06-069-44/+18
| | | | | Define ARM_CP15_TEXT_SECTION to BSP_START_TEXT_SECTION so that the start code is in the right section.
* bsps/arm: Simplify L1 caches supportSebastian Huber2014-06-051-55/+12
| | | | Delete superfluous/incorrect interrupt disable/enable.
* bsps/arm: Cortex-A9 MPCore startSebastian Huber2014-06-051-0/+5
| | | | Invalidate entire branch predictor array.
* bsps/arm: Cortex-A9 MPCore startSebastian Huber2014-06-051-4/+4
| | | | Enable SCU only on the boot processor.
* bsps/arm: Cortex-A9 MPCore startSebastian Huber2014-06-051-6/+13
| | | | Add arm_a9mpcore_start_enable_smp_in_auxiliary_control().
* bsps/arm: Simplify Cortex-A9 MPCore startSebastian Huber2014-06-051-31/+32
| | | | | Add arm_a9mpcore_start_on_secondary_processor(). Rely on error checks in _SMP_Start_multitasking_on_secondary_processor().
* LEON2: enable exception prinout by defaultDaniel Hellstrom2014-06-051-1/+1
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* LEON3: enable exception prinout by defaultDaniel Hellstrom2014-06-051-1/+1
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* score/sparc: Add support for paravirtualizationChristian Mauderer2014-06-035-1/+40
| | | | | | | Guest systems in paravirtualization environments run usually in user mode. Thus it is not possible to directly access the PSR and TBR registers. Use functions instead of inline assembler to access these registers if RTEMS_PARAVIRT is defined.
* mrm332: Tests now build and fewer warningsJoel Sherrill2014-06-014-12/+10
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* bsps/gdbarmsim: Add the missing bspstarthooks.c.Chris Johns2014-05-301-0/+20
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* SPARC: syscall optimizations and PSR-write fixDaniel Hellstrom2014-05-281-1/+10
| | | | | | | | | | | | | | | The last optimization missed was incorrect in regards to PSR write instruction delay must be 3 instructions. New optimizations: * align to 32-byte cache line. * rearrange code into three "blocks" of 4 instructions that is executed by syscall 2 and 3. This is to optimize for 16/32 byte cache lines. * use delay-slot instruction in trap table to reduce by one instruction. * use the fact that "wr %PSR" implements XOR to reduce by one instruction.
* LEON3: coding style clean bsp_irq_fixup()Daniel Hellstrom2014-05-281-9/+9
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* LEON3: add support for IRQ16..31 for CPU!=0Daniel Hellstrom2014-05-281-2/+3
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* bsps: Do not build tests that require a tick interrupt.Chris Johns2014-05-2821-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following BSPs do not have tick support so the tests fail: arm1136jfs arm1136js arm7tdmi arm920 armcortexa9 (does not run any more) avrtest h8sim h8sxsim m32csim m32rsim moxiesim simsh1 simsh2 simsh4 v850e1sim v850e2sim v850e2v3sim v850esim v850essim v850sim This list was provided by Joel in the following post: http://www.rtems.org/pipermail/rtems-devel/2014-April/006526.html
* bsp/altera-cyclone-v: CleanupRalf Kirchner2014-05-281-3/+3
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* bsp/altera-cyclone-v: Reduce size of nocache heapRalf Kirchner2014-05-282-4/+4
| | | | Network mbufs and clusters now are cached. Thus the nocache heap can get reduced to 1 MByte.
* bsp/altera-cyclone-v: Cache mbufs and clustersRalf Kirchner2014-05-281-12/+0
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* bsp/altera-cyclone-v: Enable L2 cache for network driverRalf Kirchner2014-05-281-1/+14
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* bsp/altera-vyclone-v: Broadcast cache maintenancesRalf Kirchner2014-05-281-3/+3
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* bsp/arm: Broadcast cache maintenancesRalf Kirchner2014-05-281-1/+1
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* bsps/sparc: Change tabs to spaces.Daniel Cederman2014-05-2718-311/+309
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* bsps/sparc: Add copyright and license informationDaniel Cederman2014-05-2720-38/+157
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* bsps/sparc: Make lines in SPARC BSPs adhere to 80 character limit.Daniel Cederman2014-05-2721-183/+292
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