| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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boot loader.
The default tms570ls3137_hdk variant is for building RTEMS
application image starting directly from start of Flash.
Variant tms570ls3137_hdk_with_loader skips 256kB at start
of Flash to allow use with application loader.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Parameters overlay module is initialized and cleared first.
It is used later to replace exception target vectors
only if that is required.
The application loader code with CPU and SDRAM setup
code has to provide well defined pattern of instructions
at addresses 0x00000000 and 0x0000001f, because only data
read accesses can be processed reliably by POM. The expected
instruction pattern can be seen in the next example
https://github.com/hornmich/tms570ls3137-hdk-sdram/blob/master/SDRAM_SCI_configuration/source/sys_intvecs.asm
Comments with detailed description of code, background
and reasons for selected approach have been included
in TMS570 bsp startup code.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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tms570_sci_interrupt_last_close: do not wait for old data transmit.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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Signed-off-by: Premysl Houdek <kom541000@gmail.com>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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We must not load registers (e.g. PSR) from the heir context area before
the heir stopped execution.
With this patch the write to PSR is divided into two steps. We first update
the current window pointer and then we restore the status registers and
enable traps. This allows us to move the first write to PSR to be before
the write to WIM, as there is now no risk that we get an interrupt where
the CWP and WIM would be inconsistent. We only need to make sure that we
do not use any of the non-global registers or instructions that affects
CWP for three instructions after the write.
In the earlier code the non-global %o1 register was used right after the
write to PSR, which required the use of three nop:s.
Close #2472.
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closes #2432.
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Only the context of the console device was used and this is wrong in
case more than one APBUART device is available.
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flush_data_cache uses R0 directly but doesn't list it as a clobbered
register. Compiling with -O3 made this code break, since the function
that calls flush_data_cache already uses r0.
closes #2416.
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Updates #2405.
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Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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there is no need to define access macros for field covering
whole registers. In addition, BSP_FLD32 does not work right
for field 32bit length.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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The update fixes breakage of TMS570 support after Alexander Krutwig
switch of RTEMS time read to timecounter mechanism
bsps: Convert clock drivers to use a timecounter
Mechanism to specify odd (non 1 Mhz) time base update frequencies
implemented after objections of Martin Galvan.
Code is adjusted to convert RTEMS configuration parameter
microseconds_per_tick to such odd base if
TMS570_PREFERRED_TC_FREQUENCY is specified appropriately.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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The header files are generated by script make_header.py.
Current script's version can be found at:
https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python
Registers offsets and fields have been extracted from reference manual.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
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These files were left after running the script in the previous patch.
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This was done by the following script run from libbsp:
find * -name bsp.h | xargs -e grep -l "#ifndef.*_BSP_H" | while read b
do
echo $b
cpu=`echo $b | cut -d'/' -f1 | tr '[:lower:]' '[:upper:]' `
bsp=`echo $b | cut -d'/' -f2 | tr '[:lower:]' '[:upper:]' `
g="LIBBSP_${cpu}_${bsp}_BSP_H"
# echo $g
sed -e "s/ifndef _BSP_H/ifndef ${g}/" \
-e "s/define _BSP_H/define ${g}/" \
-i $b
done
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The e500v1 has no support for the ATB.
Update #2369.
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Update #2369.
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counter
timer interrupt was hard coded to 10 ms per tick.
Fix uses the setting of CONFIGURE_MICROSECONDS_PER_TICK to compute the correct start value for the counter
See for more information: http://permalink.gmane.org/gmane.os.rtems.user/22691
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This was the only configure.ac file with bspopts.h present in
AC_CONFIG_FILES(). This somehow prevented the generation of this file
leading to build errors for this BSP.
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Drop the <rtems/score/percpu.h> include since this file exposes a lot of
implementation details.
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Add rtems_interrupt_local_disable|enable() as suggested by Pavel Pisa to
emphasize that interrupts are only disabled on the current processor.
Do not define the rtems_interrupt_disable|enable|flash() macros and
functions on SMP configurations since they don't ensure system wide
mutual exclusion.
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closes #2364.
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The SPARC ABI is a bit special with respect to the floating point context.
The complete floating point context is volatile. Thus from an ABI point
of view nothing needs to be saved and restored during a context switch.
Instead the floating point context must be saved and restored during
interrupt processing. Historically the deferred floating point switch is
used for SPARC and the complete floating point context is saved and
restored during a context switch to the new floating point unit owner.
This is a bit dangerous since post-switch actions (e.g. signal handlers)
and context switch extensions may silently corrupt the floating point
context. The floating point unit is disabled for interrupt handlers.
Thus in case an interrupt handler uses the floating point unit then this
will result in a trap.
On SMP configurations the deferred floating point switch is not
supported in principle. So use here a safe floating point support. Safe
means that the volatile floating point context is saved and restored
around a thread dispatch issued during interrupt processing. Thus
post-switch actions and context switch extensions may safely use the
floating point unit.
Update #2270.
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Update #2270.
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basic VGA driver can be enabled during configure phase by exporting variable
USE_VGA=1 so that it is available in configure environment
cirrus driver is enabled the same way by exporting variable
USE_CIRRUS_GD5446=1
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driver is not initialized by default
initialization is possible through multiboot command line option or
through the string variable (see fb_default_mode.h) set in user's module
allowing the driver to evaluate this variable after the two
modules are linked together
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This BSP in intended to run on the simulator that should be built
from RSB. When building RTEMS for Epiphany --disable-networking must
be provided part of the configure command.
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