| Commit message (Collapse) | Author | Age | Files | Lines |
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+ libbsp/sparc/shared/include/pci.h was largely a copy of
an older version of the cpukit pci.h. Removed much of the
contents and included <rtems/pci.h>.
+ sparc/*/pci*.c - Move to <rtems/pci.h> required updating
to use uint32_t for dword accesses.
+ Rename PCI_MULTI_FUNCTION to PCI_HEADER_TYPE_MULTI_FUNCTION
+ Define PCI_HEADER_TYPE_MULTI_FUNCTION in cpukit pci.h and remove
PCI_MULTI_FUNCTION definitions in C files.
+ Move PCI_INVALID_VENDORDEVICEID definitions from various C files
to cpukit pci.h
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Some register layout definitions for LEON3 reside in ambapp.h which
does not really has anything to do with device registers. The
register structures has been incorrectly named LEON3_*, the cores
are not only used on LEON3 but on LEON4 and perhaps on LEON5 when
that day comes. Some structures has been renamed according to the
GRLIB core name instead, which CPU that actually use it is not
relevant. Drivers has been updated with the new names.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html
for details.
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The comment in configure.ac is probably inherited from the LEON2
BSP. The LEON3 console driver implements a "flush" mechanism on
console_close() in order to solve the problem described with
sis/LEON2.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The drivers are updated to use the new AMBA layer, however the
backwards-compatibility interface (ambapp_old) is used.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Updated SMC91111, GRETH and open_eth driver registration
code to use new AMBAPP Layer.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The old layer had some limitations/problems for multiple AHB
buses since the data structure containing all AMBA devices
were allocated before scanning.
The new layer create devices as they are found and memory is
allocated using malloc() or bsp_early_malloc() during booting.
The old 8 functions for finding a specific AHB-Slave or
APB-Slave device has been replaced with one function,
ambapp_for_each(), which iterates over all devices matching
the specified search options and calls a user provided
function. The new way lowers the footprint and makes searching
more flexible.
The frequency information is now supported, if the frequency
of one device is reported by the user.
More AHB-to-AHB bridges are supported.
The API has been split into several parts in order to lower the
footprint.
The API also introduces the AMBAPP CORE concept, where one
ambapp_core can be created from one AHB Master, AHB Slave
and one APB Slave, at least one device is required for creating
a core.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Fixed a bug where the vector number is used to clean and unmask
the IRQ at the IRQ controller, the irq number must be used.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The ISR code is updated to use argument instead of global greth
structure, now that the greth private is available in the ISR.
The shared-irq routines will unmask the IRQ, so the forced LEON3
BSP unmask/clear IRQ is removed.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The implementation use IRQ number instead of vector number since
some IRQs does not have a unique vector, for example the extended
interrupts all enter the same trap vector entry.
Added support for the LEON3 extended interrupt controller when using
the shared IRQ layer.
ERC32 patches untested.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Regenerate
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The UART indexing was rather a mess when MP was enabled. The changes
introduces two weak variables syscon_uart_index and debug_uart_index
so that the user can override the default system debug console (printk)
and system console UART (/dev/console).
The two weak variables is updated on boot to reflect the "real" UART
index.
MINOR DEVICE-FS-NAME UART
0 /dev/console Default /dev/console_a, user selectable
1 /dev/console_a APBUART[0] (missing by default)
2 /dev/console_b APBUART[1]
...
/dev/console_a is by default renamed /dev/console and assigned minor=0,
but user can select /dev/console_['a'+N] to be renamed to /dev/console
by setting syscon_uart_index=N.
On a MP system the console renamed to /dev/console is selected by CPU
index (LEON3_Cpu_Index). /dev/console_['a' + LEON3_Cpu_Index] is
renamed unless overrided. Resource sharing is performed by the user,
one should not open/access a console that another OS instance uses.
This patch also moves the initialization of the UART to the open()
call, note that before APBUART[0] was always enabled as debug uart
even on MP systems. The debug UART is initialized at boot time.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Removed old LEON2 definitions never used in LEON3 leon.h.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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If bsp_early_malloc() is called early during boot room will be
allocated after BSS END. If the function is called after boot
is will call malloc() instead. The returned memory is not freeable
and always 8-byte aligned.
If the bsp_early_malloc() isn't called the function is not
dragged in and the workspace will be unmodified in size.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Fixed a bug where the vector number is used to clean and unmask
the IRQ at the IRQ controller, the irq number must be used.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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When data cache snooping is not present the cache needs
flushing, the SPARC LEON CPUs does not have to ability
to flush individual cache rows and flushing all cache is
expensive. Instead the LDA instruction is used to force
cache miss on individual loads during the IP-align copy
operation required anyway.
GRETH GBIT non-snooping systems are still unsupported,
since it use zero-copy (can deal with unaligned DMA).
Let the bsp.h select if the GRETH driver is supported.
Currently only the LEON2/LEON3 platforms BSPs builds the
driver.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Moved the intelligence whether the driver is supported or not
completely to the BSP, now that bsp.h is included (even though it
is a driver... hmm). The ERC32 was never supported, so HAS_SMC91111
is not added to erc32/include/bsp.h.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The low level routines can be used in different occasions, it will be
required when accessing PCI.
Note the difference between byteorder.h (inlined functions) and access.S
where the functions will be declared in the library archive librtemscpu.a.
Function names starting with _ are in library and can be referenced by
function pointers.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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PR 2015/bsps
Since the configuration struct is always present one can let
DATA initialize it to reduce footprint, at the same time it
is made weak to let the user able to configure the SHM driver
without editing the driver code.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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PR 2010/bsps
The previous code only checked if d-cache snooping was implemented,
however snooping may be available but not enabled which may lead
to driver bugs.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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PR 2009/bsps
All LEON3/4 systems have a CPU-id, if on a single-CPU system the
ID is always zero. On a multicore system it ranges from 0 to 15.
The CPU index should always by updated even in a non-MP RTEMS OS
since the CPU running RTEMS may not always be CPU0. For example
when RTEMS runs on CPU1 and Linux on CPU0 in a mixed ASMP system.
The old code executed within the IRQ controller initialization code
makes no sense since the ASR register is a CPU register, it has
nothing to do with AMBA initialization either.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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PR 2008/bsps
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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The SHM code always wakes one CPU more that configured, however
this has never been a problem since RTEMS will be running on all CPUs
or only two cores were available.
PR 2006/bsps
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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This reverts commit 8ae88d7f9644ad39d88aaa86c7558ec45450e8c9.
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* shared/can/occan.c: Comment out unused var "tmp".
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PR 1917/bsps
* Makefile.am, console/erc32_console.c: Modifications to add dynamic
tables for libchip serial drivers.
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PR 1933/cpukit
* shared/irq_asm.S: From code inspection I have found the following
issues (most SMP), and some improvements in irq_asm.S. I would need a
long test with interrupts to verify the interrupt handler better,
however I can not see that these patches hurt. Please see comment per
hunk below, One should go through the file to indent delay-slots
correctly, I have fixed some in the patch areas. An extra space is
added in front of delay slots to indicate a delay slot.
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