| Commit message (Collapse) | Author | Age | Files | Lines |
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Update #3285.
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The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file. Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.
Use the following directories and files:
* bsps/shared/cache
* bsps/@RTEMS_CPU@/shared/cache
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c
Update #3285.
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Define __INSIDE_RTEMS_BSD_TCPIP_STACK__ in the network interface driver
source files to avoid some build system magic.
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A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.
This has at least seven problems:
* The make preinstall step itself needs time and disk space.
* Errors in header files show up in the build tree copy. This makes it
hard for editors to open the right file to fix the error.
* There is no clear relationship between source and build tree header
files. This makes an audit of the build process difficult.
* The visibility of all header files in the build tree makes it
difficult to enforce API barriers. For example it is discouraged to
use BSP-specifics in the cpukit.
* An introduction of a new build system is difficult.
* Include paths specified by the -B option are system headers. This
may suppress warnings.
* The parallel build had sporadic failures on some hosts.
This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.
The new cpukit include directories are:
* cpukit/include
* cpukit/score/cpu/@RTEMS_CPU@/include
* cpukit/libnetworking
The new BSP include directories are:
* bsps/include
* bsps/@RTEMS_CPU@/include
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include
There are build tree include directories for generated files.
The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.
The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.
Update #3254.
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Updates #3520.
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Updates #3520.
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Updates #3520.
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This is necessary to pick up mandatory flags provided by the build
system.
Update #3254.
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Update #3254.
Update #3260.
Update #3269.
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Update #3254.
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This makes it possible to easily use
EXTRA_DIST += foobar
in fragments.
Update #3254.
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Update #3254.
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Updates #3520.
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In case no clock driver is configured, the corresponding timer may be
stopped.
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Updates #3520.
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Updates #3520.
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Updates #3520.
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Patch was not intended to be pushed yet.
Updates #3520.
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Done:
arm
bfin
epiphany
i386
lm32
m32c
mips
moxie
nios2
or1k
powerpc
riscv
sh
sparc
sparc64
v850
To do:
m68k
Differences noted:
+ endfile was sometimes before startfile
+ endfile sometimes was hard-coded and did not have -qrtems version
+ Should -e XXX (e.g. entry point) be in linkcmds?
+ Should -u XXX (e.g. undefined symbols) be in linkcmds?
+ Typos: Odd spacing, "old_endfiles" typo, and *(old_endfiles) (not %)
+ nios2: Referenced crtnn.o not crtn.o (error)
Need to revisit:
+ m32c, moxie, sparc64 includes !nostdlib which is not used elsewhere
+ sh has -EL/-EB mapping. Why needed?
+ sparc64 didn't include crti.o/crtn.o but it is part of toolset
+ v850 uses something like this for link and end_file:
"%{qrtems: %(old_link)}"
This means that these are unnecessary. Try this on all.
+ mips uses old_link all the time also.
+ arm/tms750 adds -EB.
+ powerpc: Why do we have rtems_crt* and not use something from GCC?
Updates #3520.
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Updates #3250.
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This header file contained timing overhead values which are hard to
maintain.
Update #3254.
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Remove BSP-specific defaults for RTEMS_BSP_CLEANUP_OPTIONS to simplify
the BSP configuration and documentation. Change defaults to:
BSP_PRESS_KEY_FOR_RESET=0
BSP_RESET_BOARD_AT_EXIT=1
BSP_PRINT_EXCEPTION_CONTEXT=1
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Add device spin-lock around internal data structures. Since the driver
provides a low-level C API accessing the descriptors the application
still needs to implement part of the SMP synchonization needed between
Interrupt handler and tasks.
Close #2355.
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Update #3239.
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SMP safe by spin-lock protection and semaphore. On spin-lock per SpW/AMBA
port to allow multiple parallel register operations per port. A common
semaphore for general SpW router configuration such as routing table.
Move to a C API instead of using the I/O Manager. The SpW router driver
does not perform any I/O only management of the router.
Update #2355.
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According to data sheet bit 31 in ASR22 must be written with a zero
to start the up-counter. GRMON starts the up-counter for us. This
patch is important when running in "flight" from ROM without GRMON.
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Remove old ISR parameter since is not used by the clock driver shell.
Make an implementation optional.
Update #3139.
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Fixes #3072
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Closes #2726
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Updates #2496 but to close needs to be applied to 4.11 accoring to ticket.
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Check in init3 not needed since same data is already checked in init2
stage. Adds an extra check that the APB register space is available before
accessing it.
Updates #2331 but needs to be applied to 4.11 according to ticket.
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Update #2355
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Fixes #2878
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The GRSPW packet driver supports SMP and therefore the legacy GRSPW
driver is disabled for SMP builds.
Update #2355
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Update #2133.
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The SPARC ABI is a bit special with respect to the floating point context.
The complete floating point context is volatile. Thus, from an ABI point
of view nothing needs to be saved and restored during a context switch.
Instead the floating point context must be saved and restored during
interrupt processing. Historically, the deferred floating point switch was
used for SPARC and the complete floating point context is saved and
restored during a context switch to the new floating point unit owner.
This is a bit dangerous since post-switch actions (e.g. signal handlers)
and context switch extensions may silently corrupt the floating point
context.
The floating point unit is disabled for interrupt handlers. Thus, in case
an interrupt handler uses the floating point unit then this will result in a
trap (INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT).
In uniprocessor configurations, a lazy floating point context switch is
used. In case an active floating point thread is interrupted (PSR[EF] == 1)
and a thread dispatch is carried out, then this thread is registered as the
floating point owner. When a floating point owner is present during a
context switch, the floating point unit is disabled for the heir thread
(PSR[EF] == 0). The floating point disabled trap checks that the use of the
floating point unit is allowed and saves/restores the floating point context
on demand.
Update #3077.
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Add new fatal error INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT.
Update #3077.
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Rename SPARC_USE_SAFE_FP_SUPPORT in SPARC_USE_SYNCHRONOUS_FP_SWITCH.
Update comment.
Update #3077.
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Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC
The UT699 requires -mcpu=leon as it does not support the CAS instruction
provided by -mcpu=leon3. It also requires -mfix-ut699 for errata fixes.
UT700 and GR712RC requires the -mfix-ut700 and -mfix-gr712rc flags that
have been recently added to GCC's master and 7-branch.
Remove -msoft-float from the leon3 config to make the more common case
of using the FPU the default.
Update #3057.
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This patch adds NOP instructions to prevent instruction sequences
that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009:
"LEON3FT Stale Cache Entry After Store with Data Tag Parity Error"
for more information.
The sequences are only modified if __FIX_LEON3FT_B2BST is defined.
The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc,
and -mfix-ut699 GCC flags that prevents the sensitive sequences from
being generated.
Update #3057.
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Update #3071.
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Close #3071.
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Update #3059.
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Update #3059.
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