Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | LEON: I2CMST driver warnings fixes | Daniel Hellstrom | 2015-04-17 | 2 | -1/+4 |
| | |||||
* | LEON: OCCAN driver warnings fixes | Daniel Hellstrom | 2015-04-17 | 1 | -2/+5 |
| | |||||
* | LEON: B1553BRM driver warnings fixes | Daniel Hellstrom | 2015-04-17 | 2 | -3/+8 |
| | |||||
* | LEON: B1553RT driver warnings fixes | Daniel Hellstrom | 2015-04-17 | 2 | -4/+6 |
| | |||||
* | LEON: added get_resarray_count() helper routine | Daniel Hellstrom | 2015-04-17 | 2 | -0/+48 |
| | |||||
* | GR1553B: fixed build warnings | Daniel Hellstrom | 2015-04-17 | 5 | -56/+64 |
| | |||||
* | GPTIMER: move ISR install from init1 | Daniel Hellstrom | 2015-04-17 | 1 | -11/+18 |
| | | | | | To avoid install ISRs during init level 1 the ISR install is moved to the opening/initialization of the timer. | ||||
* | GPTIMER: fix build warnings | Daniel Hellstrom | 2015-04-17 | 2 | -3/+36 |
| | |||||
* | APBUART_CONS: fix build warning | Daniel Hellstrom | 2015-04-17 | 2 | -4/+21 |
| | |||||
* | GR-RASTA-SPW-ROUTER: fix build warnings | Daniel Hellstrom | 2015-04-17 | 2 | -7/+49 |
| | |||||
* | PCIF: fixed build warnings | Daniel Hellstrom | 2015-04-17 | 2 | -13/+28 |
| | |||||
* | GRPCI: fixed build warnings | Daniel Hellstrom | 2015-04-17 | 2 | -12/+52 |
| | |||||
* | GRSPW: fix build warnings | Daniel Hellstrom | 2015-04-17 | 1 | -4/+1 |
| | |||||
* | GRETH: fix build warnings with GCC-4.9 | Daniel Hellstrom | 2015-04-17 | 1 | -20/+23 |
| | |||||
* | GPTIMER: avoid build warnings | Daniel Hellstrom | 2015-04-17 | 1 | -10/+10 |
| | |||||
* | AHBSTAT: fix build warnings | Daniel Hellstrom | 2015-04-17 | 2 | -2/+5 |
| | |||||
* | GRTM: fixed descriptor TS bit declaration | Daniel Hellstrom | 2015-04-17 | 1 | -4/+5 |
| | |||||
* | GRSPW_PKT: grspw_status renamed in header | Daniel Hellstrom | 2015-04-17 | 1 | -1/+1 |
| | |||||
* | GR-RASTA-TMTC,rev1: add GRGPIO[0] register init | Daniel Hellstrom | 2015-04-17 | 1 | -90/+77 |
| | |||||
* | B1553BRM: change the init of the RT legalization registers | Daniel Hellstrom | 2015-04-17 | 2 | -2/+29 |
| | |||||
* | GRSPW: added clock cycles after GRSPW reset | Daniel Hellstrom | 2015-04-17 | 1 | -0/+13 |
| | | | | | added clock cycles after GRSPW reset to make sure CTRL.START bit write actually have an effect. Wait until reset is completed. | ||||
* | GRSPW_PKT: Add support for Interrupt-codes | Andreas Larsson | 2015-04-17 | 2 | -18/+363 |
| | | | | | Update: Daniel Hellstrom updated SpW-IRQ implementation accoring to changes in hardware register layout and features. | ||||
* | GRSPW: Fix incorrect register defines - presently functionally inconsequential | Andreas Larsson | 2015-04-17 | 1 | -4/+4 |
| | |||||
* | AMBAPP: updated PnP IDs database with SPWTDP | Daniel Hellstrom | 2015-04-17 | 2 | -0/+2 |
| | |||||
* | GRTIMER: added to GPTIMER driver | Daniel Hellstrom | 2015-04-17 | 1 | -0/+1 |
| | | | | | GRTIMER is compatible with GPTIMER, however the GPTIMER driver does not support the extended features of GRTIMER. | ||||
* | GRETH: avoid hw generated UDP/TCP cksum generation | Daniel Hellstrom | 2015-04-17 | 1 | -2/+2 |
| | | | | | | | | | | | | Hardware generated checksum UDP packets does not work for IP fragmented UDP packets. It seems as if the BSD stack never signals to the GRETH driver to generate or not to generate TCP/UDP checksum for different cases. The GRETH driver never tells the BSD stack about it capabilities either so there is no point generating the cksums in HW when its done in SW any way. This patch disables hardware generated UDP and TCP checksums. | ||||
* | GR-RASTA-IO: updated for new version | Daniel Hellstrom | 2015-04-17 | 1 | -17/+200 |
| | | | | | | | From this driver's point of view the major new thing is that the GRPCI peripheral PCI bridge has been updated to GRPCI2, the second version. This means that both Big and Little Endian systems are now supported and autodetected on runtime. | ||||
* | GR-RASTA-TMTC: updated for new version | Daniel Hellstrom | 2015-04-17 | 1 | -1/+192 |
| | | | | | | | | | From this driver's point of view the major new thing is that the GRPCI peripheral PCI bridge has been updated to GRPCI2, the second version. This means that both Big and Little Endian systems are now supported and autodetected on runtime. The PCI frequency is used as AMBA frequency of the GR-RASTA-TMTC. | ||||
* | LEON PCI: fix for PCI host bridge driver CFG space access | Daniel Hellstrom | 2015-04-17 | 3 | -5/+5 |
| | |||||
* | GPTIMER: timer probing must not be on timer0 | Daniel Hellstrom | 2015-04-17 | 1 | -2/+2 |
| | | | | | | | | | | | | Timers are identical within one GPTIMER core. Probing only the first timer is sufficient, however the first timer was hardcoded to timer0 which is not correct in a multi-OS system like RTEMS AMP. This patch makes sure that probing is done on the first timer that can be used by this RTEMS instance. Without this patch RTEMS AMP is broken on systems (like the GR712RC) where there is only one GPTIMER core proviing multiple timers. Designs (like the NGMP/FP) where there are multiple GPTIMER cores are not affected. | ||||
* | LEON PCI: host bridge driver support for probing dev0=AD16 | Daniel Hellstrom | 2015-04-17 | 3 | -12/+64 |
| | | | | | | | | Before the LIBPCI didn't probe device0 (AD16), the host bridge drivers used bus=dev=func=0 to internally probe the host bridge's target interface. Now that LIBPCI uses bus=dev=func=0 to access device0, bus=0xff is introduced internally to identify the host bridge target configuration space. | ||||
* | APBUART: debug bit was cleared incorrectly | Daniel Hellstrom | 2015-04-17 | 1 | -16/+16 |
| | |||||
* | NGMP PCI: added support for NGMP prototype boards | Daniel Hellstrom | 2015-04-17 | 1 | -5/+8 |
| | |||||
* | LEON GRSPW: updated to new DRVMGR translation interface | Daniel Hellstrom | 2015-04-17 | 1 | -61/+110 |
| | |||||
* | GR-CPCI-LEON4-N2X: added PCI peripheral driver for PCI device | Daniel Hellstrom | 2015-04-17 | 2 | -0/+817 |
| | | | | Interrupts have not been test yet | ||||
* | GRPCI2: updated register layout to newer specification | Daniel Hellstrom | 2015-04-17 | 1 | -3/+4 |
| | |||||
* | AMBAPP: update AMBA PnP ID database | Daniel Hellstrom | 2015-04-17 | 2 | -22/+77 |
| | |||||
* | GRPCI2: work-around for rev0 bug by limiting prefetching | Daniel Hellstrom | 2015-04-17 | 1 | -0/+8 |
| | |||||
* | PCI-RASTA: set GRPCI1 target cache-line-size to avoid poor performance | Daniel Hellstrom | 2015-04-17 | 3 | -0/+18 |
| | |||||
* | GRETH: cleaned up parts of PHY init code | Daniel Hellstrom | 2015-04-17 | 1 | -19/+14 |
| | |||||
* | GRETH: changed the PHY initialization sequence | Daniel Hellstrom | 2015-04-17 | 2 | -13/+68 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | 1. read_mii() now returns 0xffff on failure. It is more robust when it comes to reading the reset bit in the control register, that is the first access. 2. write_mii() now has error printout like read_mii(). 3. Additional (optional) PHY access debugging is now available by enabling GRETH_DEBUG_MII. Even successful accesses are printed. 4. Let PHY do power-down (not only reset) to get in a good state, this is just in case the PHY input pin settings are sampled only on PHY power-up on some PHYs. 5. PHY GBit advertisement is disabled if Gbit is not supported by MAC. Or forced if supported. 6. Auto-nego is started if supported by PHY, before it was started only if default set by PHY. 7. Reset Sequence updated: * one must wait until reset bit is self-cleared. * the DD (Disable Duplex Detection) bit is set, only affects EDCL capable devices. This lets RTEMS handle PHY initialization | ||||
* | GRETH: forcing autonegotiation during PHY initialization | Daniel Hellstrom | 2015-04-17 | 1 | -6/+11 |
| | | | | | | | Looking at PHY Ctrl register without reseting it will give back old register content, that is not stable. Instead the PHY is reset and the autonogotiation capability is read out and started if present. | ||||
* | GRETH: updated worker Deamon thread name | Daniel Hellstrom | 2015-04-17 | 1 | -1/+3 |
| | | | | The name was probably copied from the DEC21140 driver | ||||
* | GRPCI: initialize cache-line-size and latency timer | Daniel Hellstrom | 2015-04-17 | 1 | -0/+7 |
| | | | | | | In some GRPCI cores not setting the cache line size could result in long prefetches on the AMBA bus which would lead to bad performance when doing PCI reads to GRPCI target interface (DMA). | ||||
* | GRSPW: fixed SET_RMAPEN and SET_RMAPBUFDIS | Daniel Hellstrom | 2015-04-17 | 1 | -2/+2 |
| | | | | | Both ioctl commands destroyed the control register by writing the content of the status register into it. | ||||
* | GPTIMER: support separate & shared irq by clearing pending bit after ISR | Daniel Hellstrom | 2015-04-17 | 1 | -3/+5 |
| | |||||
* | GPTIMER: Only probe pending bit on timer0 | Daniel Hellstrom | 2015-04-17 | 1 | -10/+12 |
| | |||||
* | leon,gpiolib: add mask/unmask interrupt support | Daniel Hellstrom | 2015-04-17 | 3 | -0/+27 |
| | |||||
* | GRSPW: Make sure buffers are 64-bit aligned | Arvid Bjorkengren | 2015-04-17 | 1 | -4/+7 |
| | | | | This is to improve odds of getting a fast memcpy-operation. | ||||
* | APBUART: fix GRMON -u support for older UARTs | Daniel Hellstrom | 2015-04-17 | 1 | -2/+14 |
| |