| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
| |
Close #2502.
|
|
|
|
|
| |
Only the context of the console device was used and this is wrong in
case more than one APBUART device is available.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This was done by the following script run from libbsp:
find * -name bsp.h | xargs -e grep -l "#ifndef.*_BSP_H" | while read b
do
echo $b
cpu=`echo $b | cut -d'/' -f1 | tr '[:lower:]' '[:upper:]' `
bsp=`echo $b | cut -d'/' -f2 | tr '[:lower:]' '[:upper:]' `
g="LIBBSP_${cpu}_${bsp}_BSP_H"
# echo $g
sed -e "s/ifndef _BSP_H/ifndef ${g}/" \
-e "s/define _BSP_H/define ${g}/" \
-i $b
done
|
|
|
|
| |
Update #2271.
|
| |
|
| |
|
|
|
|
|
|
| |
The leon.h already contains the definition of LEON3_CLOCK_INDEX
and irq must always follow that when separate IRQ is supported by
the HW. The definitions are resued from leon.h.
|
| |
|
| |
|
| |
|
|
|
|
|
|
| |
To be merged with "leon3,ngmp: simplify cpucounter initialization"
.. as an affect of previous patch, the next must be updated too.
|
|
|
|
| |
To be merged with "leon3: make timer initialization configurable"
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
|
|
|
| |
Interrupts have not been test yet
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch adds a new driver for the GRSPW SpaceWire AMBA
interface family. The new driver does not implement a standard
RTEMS driver, instead it provides only a library interface to
the GRSPW devices. This driver can be used to implement a
RTEMS I/O driver or used directly.
New features compared with old GRSPW driver:
* zero-copy packet interface
* possibility to send/receive mulitple packets per call
* optional interrupt awaken work-task to process TX/RX queues
* DMA channels support. Before only first DMA channel supported
* Separate DMA and link control
* Packet based error flags
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Most drivers use the Driver Manager for device probing, they
work on AMBA-over-PCI systems if PCI is big-endian.
New APIs:
* GPIO Library, interfaced to GRGPIO
* GENIRQ, Generic interrupt service implementation helper
New GRLIB Drivers:
* ACTEL 1553 RT, user interface is similar to 1553 BRM driver
* GR1553 (1553 BC, RT and BM core)
* AHBSTAT (AHB error status core)
* GRADCDAC (Core interfacing to ADC/DAC hardware)
* GRGPIO (GPIO port accessed from GPIO Library)
* MCTRL (Memory controller settings configuration)
* GRETH (10/100/1000 Ethernet driver using Driver manager)
* GRPWM (Pulse Width Modulation core)
* SPICTRL (SPI master interface)
* GRSPW_ROUTER (SpaceWire Router AMBA configuration interface)
* GRCTM (SpaceCraft on-board Time Management core)
* SPWCUC (Time distribution over SpaceWire)
* GRTC (SpaceCraft up-link Tele core)
* GRTM (SpaceCraft down-link Tele Metry core)
GR712RC ASIC specific interfaces:
* GRASCS
* CANMUX (select between OCCAN and SATCAN)
* SATCAN
* SLINK
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The CCHIP driver is replaced with the GR_701 driver. The
RASTA driver is replaced by the GR-RASTA-IO driver.
All drivers are now compatible with both LEON2 and LEON3,
drivers were initialized directly by the PCI-board drivers
are now initialized by the driver manager and therefore
does not require the double code created by including for
example grcan.c into grcan_rasta.c. The other drivers needs
to be updated to the driver manager framework however.
Added support for:
* GR-701 (only LEON2 before)
* GR-RASTA-IO (only LEON2 before)
* GR-RASTA-ADCDAC
* GR-RASTA-TMTC
* GR-RASTA-SPW-ROUTER
* GR-TMTC-1553
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The old code used a limited PCI configuration library, which was
duplicated into LEON2 and LEON3 BSP pci.c together with respective
Host controller PCI interface.
The LEON2 BSP had support for AT697 PCI, and LEON3 for GRPCI PCI
Host controller. With this update new PCI Host drivers are added,
and all support the new generic PCI Library:
* AT697 PCI (LEON2 only)
* GRPCI (LEON2-GRLIB and LEON3)
* GRPCI2 (LEON2-GRLIB and LEON3)
* Actel PCIF GRLIB Wrapper (LEON3 only)
The LEON2 BSP is defined as big-endian PCI in bsp.h, since the
AT697 supports only big-endian PCI.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch reimplements the console driver of the LEON3 BSP, it
has split up the console driver in two parts: Console driver and
UART driver. Before the only UART supported was APBUART and only
on-chip APBUARTs found during startup. However splitting the
driver in two allows any UART interface to reuse the termios
attach code of the console driver, pratically this has always
been a problem when discovering APBUARTs after startup for
example the PCI board GR-RASTA-IO has APBUARTs and must wait
until after PCI has been setup.
Since the only current driver that supports the new console
driver uses the Driver Manager, the new console driver is
only enabled when Driver Manager is initialized during startup.
The new APBUART driver supports:
* polling mode
* interrupt mode
* task-driven mode
* set UART attributes
* read UART attributes (system console inherit settings from
boot loader)
* Driver manager for finding/initialization of the hardware
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
With this patch the LEON family can access the GRLIB GPTIMER using
the Timer library (TLIB).
A System Clock driver instead of BSP/clock/ck_init.c is provided
using the TLIB. The classic clock driver is split in two parts,
clock driver and timer driver. The BSPs need only to fullfill the
timer interface instead of the clock interface. Currently only
LEON3 uses it. The LEON2 Timer is not ported to TLIB.
The GPTIMER driver is implemented using the Driver Manager, so the
System Clock Driver is at this point only suitable for LEON3 when
the driver manager is initialized during BSP startup. When the DrvMgr
is not initialized during startup the standard BSP/clock dirver is
used.
LEON2 sometimes also needs to access GPTIMER when a off-chip GRLIB AMBA
systems is connected, for example AMBA-over-PCI.
|
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Remove support for using the second timer for time stamping.
Instead the user can configure the system clock timer to a higher
base clock frequency (lower the prescaler). This change does not
affect the GR712RC or LEON4-N2X. The GR712RC does not have two
GPTIMERs and the N2X uses the Interrupt Controller for time
stamping.
Bow that the AMBA initialization code exports the AMBA device,
the frequency can be obtained without an additional AMBA PnP
scanning.
|
|
|
|
|
|
|
|
|
|
|
| |
Its now possible to select which timer core will be used for
system clock timer and to control the timer prescaler that
affects all timer instances on that timer core.
The timer and interrupt controller AMBA devices are exported
to make it possible for other code to get detailed information.
For example the frequency of the timer and interrupt controller
is required by the cpucounter support.
|
| |
|
|
|
|
|
| |
No point in scanning for the same GPTIMER twice. Rely on
amba.c AMBA PnP scanning.
|
|
|
|
|
| |
Last timer instance of GPTIMER is sometimes a watchdog timer that
can reset the system on timer underflow.
|
|
|
|
| |
Update #2268.
|
|
|
|
|
|
|
| |
This allows it to be wrapped by another function at link-time
and can be used to trace interrupts. If not placed in a separate
file, the function pointer address used in BSP_shared_interrupt_init
will be resolved at compile-time, and the function will not be wrappable.
|
| |
|
|
|
|
| |
Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
The dummy.c was a de-facto default configuration. Rename it to
default-configuration.c. Use unlimited objects and the stack checker.
This makes it easier for new RTEMS users which will likely use this file
if they just work with the usual main() function as the application
entry point. Provide proper arguments for main() using the BSP command
line. Add spare user extensions and drivers.
Do not initialize the network by default. Delete bspinit.c.
|
|
|
|
| |
Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.
It was also possible to reduce the interrupt trap handler by
five instructions due to this.
|
|
|
|
|
| |
Condition needs to be inverted, as a 1 in the mask register means
that the interrupt is enabled. Solves ticket #1958 in trac.
|
|
|
|
|
| |
This option is necessary to use the latest GCC 4.8, 4.9 and 5.0
versions.
|
| |
|