| Commit message (Collapse) | Author | Age | Files | Lines |
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The SPARC ABI is a bit special with respect to the floating point context.
The complete floating point context is volatile. Thus, from an ABI point
of view nothing needs to be saved and restored during a context switch.
Instead the floating point context must be saved and restored during
interrupt processing. Historically, the deferred floating point switch was
used for SPARC and the complete floating point context is saved and
restored during a context switch to the new floating point unit owner.
This is a bit dangerous since post-switch actions (e.g. signal handlers)
and context switch extensions may silently corrupt the floating point
context.
The floating point unit is disabled for interrupt handlers. Thus, in case
an interrupt handler uses the floating point unit then this will result in a
trap (INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT).
In uniprocessor configurations, a lazy floating point context switch is
used. In case an active floating point thread is interrupted (PSR[EF] == 1)
and a thread dispatch is carried out, then this thread is registered as the
floating point owner. When a floating point owner is present during a
context switch, the floating point unit is disabled for the heir thread
(PSR[EF] == 0). The floating point disabled trap checks that the use of the
floating point unit is allowed and saves/restores the floating point context
on demand.
Update #3077.
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Add new fatal error INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT.
Update #3077.
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Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC
The UT699 requires -mcpu=leon as it does not support the CAS instruction
provided by -mcpu=leon3. It also requires -mfix-ut699 for errata fixes.
UT700 and GR712RC requires the -mfix-ut700 and -mfix-gr712rc flags that
have been recently added to GCC's master and 7-branch.
Remove -msoft-float from the leon3 config to make the more common case
of using the FPU the default.
Update #3057.
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Close #3071.
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Update #2825.
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Use _Thread_Do_dispatch() instead of _Thread_Dispatch(). Restore the
PSR[EF] state of the interrupted context via new system call
syscall_irqdis_fp in case floating-point support is enabled.
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Rework CPU counter support to enable use of the GR740 up-counter via
%asr22 and %asr23.
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Move content to bsp_predriver_hook() functions of the BSPs.
Update #2408.
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To be merged with "leon3,ngmp: simplify cpucounter initialization"
.. as an affect of previous patch, the next must be updated too.
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Remove support for using the second timer for time stamping.
Instead the user can configure the system clock timer to a higher
base clock frequency (lower the prescaler). This change does not
affect the GR712RC or LEON4-N2X. The GR712RC does not have two
GPTIMERs and the N2X uses the Interrupt Controller for time
stamping.
Bow that the AMBA initialization code exports the AMBA device,
the frequency can be obtained without an additional AMBA PnP
scanning.
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Update #2268.
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Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
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Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
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* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.
It was also possible to reduce the interrupt trap handler by
five instructions due to this.
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Provide it also if RTEMS_MULTIPROCESSING is defined.
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Check that data cache snooping exists and is enabled on all cores.
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Changed LEON3_irq-mp to const also.
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By removing the bsp_reset() mechanism and instead relying on the
CPU_Fatal_halt() routine SMP and single-core can halt by updating
the _Internal_errors_What_happened structure and set the state to
SYSTEM_STATE_TERMINATED (the generic way). This will be better
for test scripts and debugger that can generically look into why
the OS stopped.
For SMP systems, only the fatal-reporting CPU waits until all other
CPUs are powered down (with a time out of one clock tick). The
reason why a fatal stop happend may be because CPU0 was soft-locked
up so we can never trust that CPU0 should do the halt for us.
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The Fatal_halt handler now have two options, either halt
as before or enter system error state to return to
debugger or simulator. The exit-code is now also
propagated to the debugger which is very useful for
testing.
The CPU_Fatal_halt handler was split up into two, since
the only the LEON3 support the CPU power down.
The LEON3 halt now uses the power-down instruction to save
CPU power. This doesn't stop a potential watch-dog timer
from expiring.
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The LEON3_MP_IRQ define is used to pick the IRQ to be used by the
shared memory driver and for inter-processor interrupts. On some LEON3
systems, for example the GR712RC, the default value of 14 is not suitable.
To make this value configurable from the application, it is replaced with
a weakly linked variable that can be overridden from the application.
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Rename _BSP_Exception_frame_print() to _CPU_Exception_frame_print() to
be in line with other CPU port functions.
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Rename _BSP_Start_multitasking to _LEON3_Start_multitasking to show that
it is LEON specific
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A secondary processor might miss changes done to the trap table
if the instruction cache is not flushed. Once interrupts are enabled
any other required cache flushes can be ordered via the cache
manager.
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Guest systems in paravirtualization environments run usually in user
mode. Thus it is not possible to directly access the PSR and TBR
registers. Use functions instead of inline assembler to access these
registers if RTEMS_PARAVIRT is defined.
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Use a standard function for startup on secondary processors.
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This enables re-use for other BSPs
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Rename rtems_smp_get_current_processor() in
rtems_get_current_processor(). Make rtems_get_current_processor() a
function in uni-processor configurations to enable ABI compatibility
with SMP configurations.
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Rename rtems_smp_get_processor_count() in rtems_get_processor_count().
Make rtems_get_processor_count() a function in uni-processor
configurations to enable ABI compatibility with SMP configurations.
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See errata of respective chip. Some code-cleanup as well.
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Use the interrupt controller timestamping counter for the CPU counter if
available since it runs with a high frequency.
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The SPARC processors supported by RTEMS have no built-in CPU counter
support. We have to use some hardware counter module for this purpose.
The BSP must provide a 32-bit register which contains the current CPU
counter value and a function for the difference calculation. It can use
for example the GPTIMER instance used for the clock driver.
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