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* GRETH: fix build warnings with GCC-4.9Daniel Hellstrom2015-04-171-1/+1
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* LEON: added new drivers to the LEON2/LEON3 BSPsDaniel Hellstrom2015-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most drivers use the Driver Manager for device probing, they work on AMBA-over-PCI systems if PCI is big-endian. New APIs: * GPIO Library, interfaced to GRGPIO * GENIRQ, Generic interrupt service implementation helper New GRLIB Drivers: * ACTEL 1553 RT, user interface is similar to 1553 BRM driver * GR1553 (1553 BC, RT and BM core) * AHBSTAT (AHB error status core) * GRADCDAC (Core interfacing to ADC/DAC hardware) * GRGPIO (GPIO port accessed from GPIO Library) * MCTRL (Memory controller settings configuration) * GRETH (10/100/1000 Ethernet driver using Driver manager) * GRPWM (Pulse Width Modulation core) * SPICTRL (SPI master interface) * GRSPW_ROUTER (SpaceWire Router AMBA configuration interface) * GRCTM (SpaceCraft on-board Time Management core) * SPWCUC (Time distribution over SpaceWire) * GRTC (SpaceCraft up-link Tele core) * GRTM (SpaceCraft down-link Tele Metry core) GR712RC ASIC specific interfaces: * GRASCS * CANMUX (select between OCCAN and SATCAN) * SATCAN * SLINK
* LEON3: new Console driver, APBUART driver using Driver ManagerDaniel Hellstrom2015-04-172-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | This patch reimplements the console driver of the LEON3 BSP, it has split up the console driver in two parts: Console driver and UART driver. Before the only UART supported was APBUART and only on-chip APBUARTs found during startup. However splitting the driver in two allows any UART interface to reuse the termios attach code of the console driver, pratically this has always been a problem when discovering APBUARTs after startup for example the PCI board GR-RASTA-IO has APBUARTs and must wait until after PCI has been setup. Since the only current driver that supports the new console driver uses the Driver Manager, the new console driver is only enabled when Driver Manager is initialized during startup. The new APBUART driver supports: * polling mode * interrupt mode * task-driven mode * set UART attributes * read UART attributes (system console inherit settings from boot loader) * Driver manager for finding/initialization of the hardware
* LEON: GPTIMER driver, Timer Library and System Clock for LEON3Daniel Hellstrom2015-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | With this patch the LEON family can access the GRLIB GPTIMER using the Timer library (TLIB). A System Clock driver instead of BSP/clock/ck_init.c is provided using the TLIB. The classic clock driver is split in two parts, clock driver and timer driver. The BSPs need only to fullfill the timer interface instead of the clock interface. Currently only LEON3 uses it. The LEON2 Timer is not ported to TLIB. The GPTIMER driver is implemented using the Driver Manager, so the System Clock Driver is at this point only suitable for LEON3 when the driver manager is initialized during BSP startup. When the DrvMgr is not initialized during startup the standard BSP/clock dirver is used. LEON2 sometimes also needs to access GPTIMER when a off-chip GRLIB AMBA systems is connected, for example AMBA-over-PCI.
* LEON3: implemented AMBA PnP Bus Driver for Driver ManagerDaniel Hellstrom2015-04-171-0/+7
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* sparc BSPs: implemented libpci IRQ BSP supportDaniel Hellstrom2015-04-171-2/+7
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* leon3: make timer initialization configurableDaniel Hellstrom2015-04-171-0/+24
| | | | | | | | | | | Its now possible to select which timer core will be used for system clock timer and to control the timer prescaler that affects all timer instances on that timer core. The timer and interrupt controller AMBA devices are exported to make it possible for other code to get detailed information. For example the frequency of the timer and interrupt controller is required by the cpucounter support.
* LEON3: GPTIMER timer watchdog driverDaniel Hellstrom2015-04-171-0/+49
| | | | | Last timer instance of GPTIMER is sometimes a watchdog timer that can reset the system on timer underflow.
* bsp/sparc: Move BSP_ISR_handler to a separate file and rename itDaniel Cederman2015-02-111-0/+3
| | | | | | | This allows it to be wrapped by another function at link-time and can be used to trace interrupts. If not placed in a separate file, the function pointer address used in BSP_shared_interrupt_init will be resolved at compile-time, and the function will not be wrappable.
* sparc/leon3: LEON_Is_interrupt_masked for Leon3 in leon.h wrongly definedJiri Gaisler2014-12-021-3/+1
| | | | | Condition needs to be inverted, as a 1 in the mask register means that the interrupt is enabled. Solves ticket #1958 in trac.
* bsp/leon3: Fix LEON3_mp_irq definitionSebastian Huber2014-10-231-1/+2
| | | | Provide it also if RTEMS_MULTIPROCESSING is defined.
* bsps: Move extern "C" to not cover includesSebastian Huber2014-10-231-4/+4
| | | | Some includes may use C++ and this conflicts if surrounded extern "C".
* bsp/sparc: Ensure that data cache snooping is enabledDaniel Cederman2014-10-231-0/+6
| | | | Check that data cache snooping exists and is enabled on all cores.
* sparc/leon3/include/bsp.h: Fix warningsJoel Sherrill2014-10-191-0/+5
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* LEON3 SMP: support static interrupt affinityDaniel Hellstrom2014-10-091-1/+12
| | | | Changed LEON3_irq-mp to const also.
* SPARC BSPs: added CPU aware interrupt ctrl operationsDaniel Hellstrom2014-10-091-12/+40
| | | | | | The LEON2 and ERC32 maps the new macros to CPU0 since they do not support SMP. With the LEON3 a specific CPU's interrupt controller registers can be modified using macros.
* SPARC: add BSP specific error handlerDaniel Hellstrom2014-10-061-0/+2
| | | | | | | | Instead of calling the system call TA instruction directly it is better paractise to isolate the trap implementation to the system call functions. BSP_fatal_exit() is added.
* SPARC BSPs: remove BSP_fatal_return unreached codeDaniel Hellstrom2014-10-061-2/+0
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* bsp/leon3: Replace the define LEON3_MP_IRQ with a weakly linked variableDaniel Cederman2014-10-022-2/+7
| | | | | | | | The LEON3_MP_IRQ define is used to pick the IRQ to be used by the shared memory driver and for inter-processor interrupts. On some LEON3 systems, for example the GR712RC, the default value of 14 is not suitable. To make this value configurable from the application, it is replaced with a weakly linked variable that can be overridden from the application.
* score: Add SMP support to the cache managerDaniel Cederman2014-08-221-0/+2
| | | | | | | | | Adds functions that allows the user to specify which cores that should perform the cache operation. SMP messages are sent to all the specified cores and the caller waits until all cores have acknowledged that they have flushed their cache. If CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING is defined the instruction cache invalidation function will perform the operation on all cores using the previous method.
* bsp/sparc: Flush only instruction cacheDaniel Cederman2014-08-222-1/+9
| | | | | | The flush instruction on LEON flushes both the data and the instruction cache. Flushing of just the instruction cache can be done by setting the "flush instruction cache" bit in the cache control register.
* bsps/sparc: Move APBUART printk supportChristian Mauderer2014-07-091-19/+0
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* bsps/sparc: Reduce copy and pasteSebastian Huber2014-07-011-33/+0
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* LEON3: devfs free nodes must be sizedDaniel Hellstrom2014-06-301-0/+3
| | | | | | | | | .. according to the maximum number of termios ports which is 8. Since LEON3 uses PnP to find how many UARTs there are present we must make sure worst case work. The current maximum of 4 free nodes caused for example the GR712RC with its 6 UARTs to fail during devfs02 test.
* LEON3: coding style clean bsp_irq_fixup()Daniel Hellstrom2014-05-281-9/+9
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* LEON3: add support for IRQ16..31 for CPU!=0Daniel Hellstrom2014-05-281-2/+3
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* bsps/sparc: Change tabs to spaces.Daniel Cederman2014-05-272-7/+7
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* bsps/sparc: Add copyright and license informationDaniel Cederman2014-05-272-2/+11
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* bsps/sparc: Make lines in SPARC BSPs adhere to 80 character limit.Daniel Cederman2014-05-272-11/+16
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* bsps: Use bsp_start_on_secondary_processor()Sebastian Huber2014-05-121-7/+0
| | | | Use a standard function for startup on secondary processors.
* bsps/sparc: Move flags to grlib headerChristian Mauderer2014-05-121-5/+0
| | | | This enables re-use for other BSPs
* bsps/sparc: Change asm to __asm__ to compile with -pedantic.Daniel Cederman2014-03-211-1/+1
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* Change all references of rtems.com to rtems.org.Chris Johns2014-03-216-6/+6
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* score: Add local context to SMP lock APISebastian Huber2014-03-111-16/+16
| | | | | | | | | | | Add a local context structure to the SMP lock API for acquire and release pairs. This context can be used to store the ISR level and profiling information. It may be later used to enable more sophisticated lock algorithms, e.g. MCS locks. There is only one lock that cannot be used with a local context. This is the per-CPU lock since here we would have to transfer the local context through a context switch which is very complicated.
* bsp/leon3: Use interrupt timestamping counterSebastian Huber2014-03-101-0/+7
| | | | | Use the interrupt controller timestamping counter for the CPU counter if available since it runs with a high frequency.
* bsp/leon3: Add L2 cache supportSebastian Huber2014-02-281-0/+88
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* bsp/leon3: Add new cache manager implementationSebastian Huber2014-02-281-0/+109
| | | | | | | | | | | The previous implementation used an instruction cache line size of 0, this is a bogus value. Use a instruction cache line size of 64 since the L2 cache may have a line size of 32 or 64. A greater value should cause no harm. Use a FLUSH operation for _CPU_cache_invalidate_instruction_range(). This is a preperation step to support the L2 cache.
* bsp/leon3: Add and use cache register functionsSebastian Huber2014-02-281-0/+42
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* bsp/leon3: Use ambapp_freq_get() for CPU counterSebastian Huber2014-02-281-0/+7
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* sparc: Fix CPU counter supportSebastian Huber2014-02-241-0/+7
| | | | | | | | The SPARC processors supported by RTEMS have no built-in CPU counter support. We have to use some hardware counter module for this purpose. The BSP must provide a 32-bit register which contains the current CPU counter value and a function for the difference calculation. It can use for example the GPTIMER instance used for the clock driver.
* bsp/leon3: Add and use leon3_get_cpu_count()Sebastian Huber2014-02-211-0/+9
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* bsp/leon3: Add leon3_power_down_loop()Sebastian Huber2014-02-211-0/+2
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* bsp/leon3: Add and use LEON3_IrqCtrl_LockSebastian Huber2014-02-191-13/+21
| | | | | Disabling of interrupts is not enough to ensure mutual exclusion on SMP configurations.
* bsp/leon3: Declare LEON3_IrqCtrl_EIrq only onceSebastian Huber2014-02-191-2/+2
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* bsp/leon3: Declare leon3_ext_irq_init() in headerSebastian Huber2014-02-191-0/+3
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* score: Add RTEMS_FATAL_SOURCE_BSPSebastian Huber2014-02-191-4/+0
| | | | | | Merge RTEMS_FATAL_SOURCE_BSP_GENERIC and RTEMS_FATAL_SOURCE_BSP_SPECIFIC into new fatal source RTEMS_FATAL_SOURCE_BSP. This makes it easier to figure out the code position given a fatal source and code.
* bsp/leon3: Declare amba_initialize()Sebastian Huber2014-02-141-0/+2
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* sparc: Add LEON3_ASR17_PROCESSOR_INDEX_SHIFTSebastian Huber2014-02-141-1/+1
| | | | Add _LEON3_Get_current_processor().
* score: Add CPU counter supportSebastian Huber2014-02-142-0/+6
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* bsp/leon3: Declare bsp_debug_uart_init() in headerSebastian Huber2014-02-061-0/+2
| | | | Do not return a status.
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